rpi3: Enable SDHost driver in BL2

This patch inits SDHost in BL2 earlysetup. BL2 can start operating mmc
commands to read/write MMC raw blocks.
Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>

plat/rpi3/include/platform_def.h

@@ -244,6 +244,8 @@
 #define MAX_IO_DEVICES			U(3)
 #define MAX_IO_HANDLES			U(4)
 
+#define MAX_IO_BLOCK_DEVICES		U(1)
+
 /*
  * Serial-related constants.
  */

plat/rpi3/platform.mk

@@ -31,6 +31,9 @@ BL2_SOURCES		+=	common/desc_image_load.c		\
 				drivers/delay_timer/delay_timer.c	\
 				drivers/delay_timer/generic_delay_timer.c \
 				drivers/rpi3/gpio/rpi3_gpio.c		\
+				drivers/io/io_block.c			\
+				drivers/mmc/mmc.c			\
+				drivers/rpi3/sdhost/rpi3_sdhost.c	\
 				plat/common/aarch64/platform_mp_stack.S	\
 				plat/rpi3/aarch64/plat_helpers.S	\
 				plat/rpi3/aarch64/rpi3_bl2_mem_params_desc.c \

plat/rpi3/rpi3_bl2_setup.c

@@ -17,6 +17,7 @@
 #include <lib/xlat_tables/xlat_tables_defs.h>
 #include <drivers/generic_delay_timer.h>
 #include <drivers/rpi3/gpio/rpi3_gpio.h>
+#include <drivers/rpi3/sdhost/rpi3_sdhost.h>
 
 #include "rpi3_private.h"
 
@@ -34,6 +35,21 @@ static void rpi3_gpio_setup(void)
 	rpi3_gpio_init(&params);
 }
 
+/* Data structure which holds the MMC info */
+static struct mmc_device_info mmc_info;
+
+static void rpi3_sdhost_setup(void)
+{
+	struct rpi3_sdhost_params params;
+
+	memset(&params, 0, sizeof(struct rpi3_sdhost_params));
+	params.reg_base = RPI3_SDHOST_BASE;
+	params.bus_width = MMC_BUS_WIDTH_4;
+	params.clk_rate = 392464;
+	mmc_info.mmc_dev_type = MMC_IS_SD_HC;
+	rpi3_sdhost_init(&params, &mmc_info);
+}
+
 /*******************************************************************************
  * BL1 has passed the extents of the trusted SRAM that should be visible to BL2
  * in x0. This memory layout is sitting at the base of the free trusted SRAM.
@@ -57,6 +73,9 @@ void bl2_early_platform_setup2(u_register_t arg0, u_register_t arg1,
 	/* Setup the BL2 memory layout */
 	bl2_tzram_layout = *mem_layout;
 
+	/* Setup SDHost driver */
+	rpi3_sdhost_setup();
+
 	plat_rpi3_io_setup();
 }
 
@@ -122,6 +141,9 @@ int bl2_plat_handle_post_image_load(unsigned int image_id)
 		/* BL33 expects to receive the primary CPU MPID (through r0) */
 		bl_mem_params->ep_info.args.arg0 = 0xffff & read_mpidr();
 		bl_mem_params->ep_info.spsr = rpi3_get_spsr_for_bl33_entry();
+
+		/* Shutting down the SDHost driver to let BL33 drives SDHost.*/
+		rpi3_sdhost_stop();
 		break;
 
 	default:

plat/rpi3/rpi3_hw.h

@@ -89,6 +89,12 @@
 #define RPI3_IO_GPIO_OFFSET		ULL(0x00200000)
 #define RPI3_GPIO_BASE			(RPI3_IO_BASE + RPI3_IO_GPIO_OFFSET)
 
+/*
+ * SDHost controller
+ */
+#define RPI3_IO_SDHOST_OFFSET           ULL(0x00202000)
+#define RPI3_SDHOST_BASE                (RPI3_IO_BASE + RPI3_IO_SDHOST_OFFSET)
+
 /*
  * Local interrupt controller
  */