Merge pull request #36 from athoelke/at/gc-sections-80

Using GCC --gc-sections to eliminate unused code and data

lib/semihosting/aarch64/semihosting_call.S

@@ -28,10 +28,10 @@
  * POSSIBILITY OF SUCH DAMAGE.
  */
 
-	.globl	semihosting_call
+#include <asm_macros.S>
 
-	.section	.text, "ax"
+	.globl	semihosting_call
 
-semihosting_call: ; .type semihosting_call, %function
+func semihosting_call
 	hlt	#0xf000
 	ret

lib/sync/locks/exclusive/spinlock.S

@@ -28,13 +28,13 @@
  * POSSIBILITY OF SUCH DAMAGE.
  */
 
+#include <asm_macros.S>
+
 	.globl	spin_lock
 	.globl	spin_unlock
 
 
-	.section	.text, "ax";
-
-spin_lock: ; .type spin_lock, %function
+func spin_lock
 	mov	w2, #1
 	sevl
 l1:	wfe
@@ -45,6 +45,6 @@ l2:	ldaxr	w1, [x0]
 	ret
 
 
-spin_unlock: ; .type spin_unlock, %function
+func spin_unlock
 	stlr	wzr, [x0]
 	ret

plat/common/aarch64/platform_helpers.S

@@ -30,6 +30,7 @@
 
 #include <arch.h>
 #include <platform.h>
+#include <asm_macros.S>
 
 
 	.globl	pcpu_dv_mem_stack
@@ -51,8 +52,6 @@
 #define PCPU_DV_MEM_STACK_SIZE	0x300
 #endif
 
-	.section	.text, "ax"; .align 3
-
 	/* -----------------------------------------------------
 	 * unsigned long long platform_set_coherent_stack
 	 *                                    (unsigned mpidr);
@@ -62,7 +61,7 @@
 	 * SCTLR.C bit e.g. while powering down a cpu
 	 * -----------------------------------------------------
 	 */
-platform_set_coherent_stack: ; .type platform_set_coherent_stack, %function
+func platform_set_coherent_stack
 	mov	x5, x30 // lr
 	bl	platform_get_core_pos
 	add	x0, x0, #1
@@ -79,7 +78,7 @@ platform_set_coherent_stack: ; .type platform_set_coherent_stack, %function
 	 *  				  CoreId
 	 * -----------------------------------------------------
 	 */
-platform_get_core_pos: ; .type platform_get_core_pos, %function
+func platform_get_core_pos
 	and	x1, x0, #MPIDR_CPU_MASK
 	and	x0, x0, #MPIDR_CLUSTER_MASK
 	add	x0, x1, x0, LSR #6
@@ -93,7 +92,7 @@ platform_get_core_pos: ; .type platform_get_core_pos, %function
 	 * cpu (applicable ony after a cold boot)
 	 * -----------------------------------------------------
 	 */
-platform_is_primary_cpu: ; .type platform_is_primary_cpu, %function
+func platform_is_primary_cpu
 	and	x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)
 	cmp	x0, #PRIMARY_CPU
 	cset	x0, eq
@@ -103,7 +102,7 @@ platform_is_primary_cpu: ; .type platform_is_primary_cpu, %function
 	 * void platform_get_stack (unsigned long mpidr)
 	 * -----------------------------------------------------
 	 */
-platform_get_stack: ; .type platform_get_stack, %function
+func platform_get_stack
 	mov	x10, x30 // lr
 	bl	platform_get_core_pos
 	add	x0, x0, #1
@@ -117,7 +116,7 @@ platform_get_stack: ; .type platform_get_stack, %function
 	 * void platform_set_stack (unsigned long mpidr)
 	 * -----------------------------------------------------
 	 */
-platform_set_stack: ; .type platform_set_stack, %function
+func platform_set_stack
 	mov	x9, x30 // lr
 	bl	platform_get_stack
 	mov	sp, x0
@@ -128,7 +127,7 @@ platform_set_stack: ; .type platform_set_stack, %function
 	 * each platform.
 	 * -----------------------------------------------------
 	 */
-platform_check_mpidr: ; .type platform_check_mpidr, %function
+func platform_check_mpidr
 	mov	x0, xzr
 	ret
 
@@ -137,7 +136,7 @@ platform_check_mpidr: ; .type platform_check_mpidr, %function
 	 * each platform.
 	 * -----------------------------------------------------
 	 */
-plat_report_exception:
+func plat_report_exception
 	ret
 
 	/* -----------------------------------------------------

plat/fvp/aarch64/bl1_plat_helpers.S

@@ -32,15 +32,13 @@
 #include <platform.h>
 #include <fvp_pwrc.h>
 #include <gic.h>
+#include <asm_macros.S>
 
 	.globl	platform_get_entrypoint
 	.globl	platform_cold_boot_init
 	.globl	plat_secondary_cold_boot_setup
 
 
-	.section	.text, "ax"; .align 3
-
-
 	.macro	platform_choose_gicmmap  param1, param2, x_tmp, w_tmp, res
 	ldr	\x_tmp, =VE_SYSREGS_BASE + V2M_SYS_ID
 	ldr	\w_tmp, [\x_tmp]
@@ -60,7 +58,7 @@
 	 * that the request has gone through.
 	 * -----------------------------------------------------
 	 */
-plat_secondary_cold_boot_setup: ; .type plat_secondary_cold_boot_setup, %function
+func plat_secondary_cold_boot_setup
 	bl	read_mpidr
 	mov	x19, x0
 	bl	platform_get_core_pos
@@ -120,7 +118,7 @@ cb_panic:
 	 * 	reset all cpus will read the same WK field
 	 * -----------------------------------------------------
 	 */
-platform_get_entrypoint: ; .type platform_get_entrypoint, %function
+func platform_get_entrypoint
 	mov	x9, x30 // lr
 	mov	x2, x0
 	ldr	x1, =PWRC_BASE
@@ -160,7 +158,7 @@ _panic:	b	_panic
 	 * BL1 will always read the mailboxes with the MMU off
 	 * -----------------------------------------------------
 	 */
-platform_mem_init: ; .type platform_mem_init, %function
+func platform_mem_init
 	ldr	x0, =TZDRAM_BASE + MBOX_OFF
 	stp	xzr, xzr, [x0, #0]
 	stp	xzr, xzr, [x0, #0x10]
@@ -176,7 +174,7 @@ platform_mem_init: ; .type platform_mem_init, %function
 	 * boot to perform early platform initialization
 	 * -----------------------------------------------------
 	 */
-platform_cold_boot_init: ; .type platform_cold_boot_init, %function
+func platform_cold_boot_init
 	mov	x20, x0
 	bl	platform_mem_init
 	bl	read_mpidr

plat/fvp/aarch64/plat_helpers.S

@@ -30,11 +30,10 @@
 
 #include <arch.h>
 #include <platform.h>
+#include <asm_macros.S>
 
 	.globl	plat_report_exception
 
-	.section	.text, "ax"
-
 	/* ---------------------------------------------
 	 * void plat_report_exception(unsigned int type)
 	 * Function to report an unhandled exception
@@ -43,7 +42,7 @@
 	 * to indicate where we are
 	 * ---------------------------------------------
 	 */
-plat_report_exception:
+func plat_report_exception
 	mrs	x1, CurrentEl
 	lsr	x1, x1, #MODE_EL_SHIFT
 	lsl	x1, x1, #SYS_LED_EL_SHIFT

services/spd/tspd/tspd_helpers.S

@@ -44,7 +44,7 @@
 	 * saved.
 	 * ---------------------------------------------
 	 */
-tspd_enter_sp:
+func tspd_enter_sp
 	/* Make space for the registers that we're going to save */
 	mov	x3, sp
 	str	x3, [x0, #0]
@@ -79,7 +79,7 @@ tspd_enter_sp:
 	 * ---------------------------------------------
 	 */
 	.global tspd_exit_sp
-tspd_exit_sp:
+func tspd_exit_sp
 	/* Restore the previous stack */
 	mov	sp, x0
 

services/std_svc/psci/psci_entry.S

@@ -41,8 +41,6 @@
 	.globl	__psci_cpu_off
 	.globl	__psci_cpu_suspend
 
-	.section	.text, "ax"; .align 3
-
 	/* -----------------------------------------------------
 	 * This cpu has been physically powered up. Depending
 	 * upon whether it was resumed from suspend or simply
@@ -55,7 +53,7 @@
 	 * all this is done.
 	 * -----------------------------------------------------
 	 */
-psci_aff_on_finish_entry:
+func psci_aff_on_finish_entry
 	adr	x23, psci_afflvl_on_finishers
 	b	psci_aff_common_finish_entry
 
@@ -120,7 +118,7 @@ _panic:
 	 * suffering from stack coherency issues
 	 * -----------------------------------------------------
 	 */
-__psci_cpu_off:
+func __psci_cpu_off
 	func_prologue
 	sub	sp, sp, #0x10
 	stp	x19, x20, [sp, #0]
@@ -137,7 +135,7 @@ __psci_cpu_off:
 	func_epilogue
 	ret
 
-__psci_cpu_suspend:
+func __psci_cpu_suspend
 	func_prologue
 	sub	sp, sp, #0x20
 	stp	x19, x20, [sp, #0]
@@ -162,7 +160,7 @@ __psci_cpu_suspend:
 	func_epilogue
 	ret
 
-final_wfi:
+func final_wfi
 	dsb	sy
 	wfi
 wfi_spill: