diff --git a/plat/socionext/uniphier/uniphier_io_storage.c b/plat/socionext/uniphier/uniphier_io_storage.c
index bc31350deb4d54a8ca803dec3dce4fef3e820e10..90f16a98eb1a25887905e8f67c8522320dbe042c 100644
--- a/plat/socionext/uniphier/uniphier_io_storage.c
+++ b/plat/socionext/uniphier/uniphier_io_storage.c
@@ -21,6 +21,9 @@
 #define UNIPHIER_ROM_REGION_BASE	0x00000000
 #define UNIPHIER_ROM_REGION_SIZE	0x10000000
 
+#define UNIPHIER_OCM_REGION_BASE	0x30000000
+#define UNIPHIER_OCM_REGION_SIZE	0x00040000
+
 static const io_dev_connector_t *uniphier_fip_dev_con;
 static uintptr_t uniphier_fip_dev_handle;
 
@@ -271,6 +274,18 @@ static int uniphier_io_usb_setup(unsigned int soc_id)
 	if (ret)
 		return ret;
 
+	/*
+	 * on-chip SRAM region: should be DEVICE attribute because the USB
+	 * load functions provided by the ROM use this memory region as a work
+	 * area, but do not cater to cache coherency.
+	 */
+	ret = mmap_add_dynamic_region(UNIPHIER_OCM_REGION_BASE,
+				      UNIPHIER_OCM_REGION_BASE,
+				      UNIPHIER_OCM_REGION_SIZE,
+				      MT_DEVICE | MT_RW | MT_SECURE);
+	if (ret)
+		return ret;
+
 	ret = uniphier_usb_init(soc_id, &block_dev_spec);
 	if (ret)
 		return ret;
diff --git a/plat/socionext/uniphier/uniphier_xlat_setup.c b/plat/socionext/uniphier/uniphier_xlat_setup.c
index 6532c493f1a88202c0250aba00b0faae0a8d0844..631ca6d500e054e0b71e0228ae7551e2c41623ae 100644
--- a/plat/socionext/uniphier/uniphier_xlat_setup.c
+++ b/plat/socionext/uniphier/uniphier_xlat_setup.c
@@ -8,9 +8,6 @@
 #include <platform_def.h>
 #include <xlat_tables_v2.h>
 
-#define UNIPHIER_OCM_REGION_BASE	0x30000000
-#define UNIPHIER_OCM_REGION_SIZE	0x00040000
-
 #define UNIPHIER_REG_REGION_BASE	0x50000000
 #define UNIPHIER_REG_REGION_SIZE	0x20000000
 
@@ -37,15 +34,6 @@ void uniphier_mmap_setup(uintptr_t total_base, size_t total_size,
 			BL_COHERENT_RAM_END - BL_COHERENT_RAM_BASE,
 			MT_DEVICE | MT_RW | MT_SECURE);
 
-	/*
-	 * on-chip SRAM region: should be DEVICE attribute because the USB
-	 * load functions provided by the ROM use this memory region as a work
-	 * area, but do not cater to cache coherency.
-	 */
-	mmap_add_region(UNIPHIER_OCM_REGION_BASE, UNIPHIER_OCM_REGION_BASE,
-			UNIPHIER_OCM_REGION_SIZE,
-			MT_DEVICE | MT_RW | MT_SECURE);
-
 	/* register region */
 	mmap_add_region(UNIPHIER_REG_REGION_BASE, UNIPHIER_REG_REGION_BASE,
 			UNIPHIER_REG_REGION_SIZE,