Merge pull request #1673 from antonio-nino-diaz-arm/an/headers

Standardise header guards across codebase

Merge pull request #1673 from antonio-nino-diaz-arm/an/headers
Standardise header guards across codebase
9d068f66 · Antonio Niño Díaz · GitHub · f5ae1b0e · c3cf06f1 · 9d068f66
Unverified Commit 9d068f66 authored Nov 08, 2018 by Antonio Niño Díaz Committed by GitHub Nov 08, 2018
--- a/plat/mediatek/mt8173/drivers/timer/mt_cpuxgpt.h
+++ b/plat/mediatek/mt8173/drivers/timer/mt_cpuxgpt.h
@@ -4,8 +4,8 @@
 * SPDX-License-Identifier: BSD-3-Clause
 */

-#ifndef __MT_CPUXGPT_H__
-#define __MT_CPUXGPT_H__
+#ifndef MT_CPUXGPT_H
+#define MT_CPUXGPT_H

 /* REG */
 #define INDEX_CNT_L_INIT    0x008
@@ -13,4 +13,4 @@

 void generic_timer_backup(void);

-#endif /* __MT_CPUXGPT_H__ */
+#endif /* MT_CPUXGPT_H */
--- a/plat/mediatek/mt8173/include/mcucfg.h
+++ b/plat/mediatek/mt8173/include/mcucfg.h
@@ -3,8 +3,8 @@
 *
 * SPDX-License-Identifier: BSD-3-Clause
 */
-#ifndef __MCUCFG_H__
-#define __MCUCFG_H__
+#ifndef MCUCFG_H
+#define MCUCFG_H

 #include <mt8173_def.h>
 #include <stdint.h>
@@ -216,4 +216,4 @@ enum {
 			  ACLK_EMI_DYNAMIC_CG_EN | ACLK_INFRA_DYNAMIC_CG_EN,
 };

-#endif  /* __MCUCFG_H__ */
+#endif /* MCUCFG_H */
--- a/plat/mediatek/mt8173/include/mt8173_def.h
+++ b/plat/mediatek/mt8173/include/mt8173_def.h
@@ -4,8 +4,8 @@
 * SPDX-License-Identifier: BSD-3-Clause
 */

-#ifndef __MT8173_DEF_H__
-#define __MT8173_DEF_H__
+#ifndef MT8173_DEF_H
+#define MT8173_DEF_H

 #if RESET_TO_BL31
 #error "MT8173 is incompatible with RESET_TO_BL31!"
@@ -149,4 +149,4 @@
 		mtk_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type))


-#endif /* __MT8173_DEF_H__ */
+#endif /* MT8173_DEF_H */
--- a/plat/mediatek/mt8173/include/plat_private.h
+++ b/plat/mediatek/mt8173/include/plat_private.h
@@ -4,8 +4,8 @@
 * SPDX-License-Identifier: BSD-3-Clause
 */

-#ifndef __PLAT_PRIVATE_H__
-#define __PLAT_PRIVATE_H__
+#ifndef PLAT_PRIVATE_H
+#define PLAT_PRIVATE_H

 /*******************************************************************************
 * Function and variable prototypes
@@ -24,4 +24,4 @@ void plat_cci_disable(void);
 /* Declarations for plat_topology.c */
 int mt_setup_topology(void);

-#endif /* __PLAT_PRIVATE_H__ */
+#endif /* PLAT_PRIVATE_H */
--- a/plat/mediatek/mt8173/include/plat_sip_calls.h
+++ b/plat/mediatek/mt8173/include/plat_sip_calls.h
@@ -4,8 +4,8 @@
 * SPDX-License-Identifier: BSD-3-Clause
 */

-#ifndef __PLAT_SIP_CALLS_H__
-#define __PLAT_SIP_CALLS_H__
+#ifndef PLAT_SIP_CALLS_H
+#define PLAT_SIP_CALLS_H

 /*******************************************************************************
 * Plat SiP function constants
@@ -19,4 +19,4 @@
 #define MTK_SIP_CLR_HDCP_KEY			0x82000406
 #define MTK_SIP_SET_HDCP_KEY_EX			0x82000407

-#endif /* __PLAT_SIP_CALLS_H__ */
+#endif /* PLAT_SIP_CALLS_H */
--- a/plat/mediatek/mt8173/include/power_tracer.h
+++ b/plat/mediatek/mt8173/include/power_tracer.h
@@ -4,8 +4,8 @@
 * SPDX-License-Identifier: BSD-3-Clause
 */

-#ifndef __POWER_TRACER_H__
-#define __POWER_TRACER_H__
+#ifndef POWER_TRACER_H
+#define POWER_TRACER_H

 #define CPU_UP		0
 #define CPU_DOWN	1
@@ -16,4 +16,4 @@

 void trace_power_flow(unsigned long mpidr, unsigned char mode);

-#endif
+#endif /* POWER_TRACER_H */
--- a/plat/mediatek/mt8173/include/scu.h
+++ b/plat/mediatek/mt8173/include/scu.h
@@ -4,10 +4,10 @@
 * SPDX-License-Identifier: BSD-3-Clause
 */

-#ifndef __SCU_H__
-#define __SCU_H__
+#ifndef SCU_H
+#define SCU_H

 void disable_scu(unsigned long mpidr);
 void enable_scu(unsigned long mpidr);

-#endif
+#endif /* SCU_H */
--- a/plat/nvidia/tegra/include/drivers/flowctrl.h
+++ b/plat/nvidia/tegra/include/drivers/flowctrl.h
@@ -4,8 +4,8 @@
 * SPDX-License-Identifier: BSD-3-Clause
 */

-#ifndef __FLOWCTRL_H__
-#define __FLOWCTRL_H__
+#ifndef FLOWCTRL_H
+#define FLOWCTRL_H

 #include <mmio.h>
 #include <tegra_def.h>
@@ -58,4 +58,4 @@ void tegra_fc_cpu_off(int cpu);
 void tegra_fc_lock_active_cluster(void);
 void tegra_fc_reset_bpmp(void);

-#endif /* __FLOWCTRL_H__ */
+#endif /* FLOWCTRL_H */
--- a/plat/nvidia/tegra/include/drivers/mce.h
+++ b/plat/nvidia/tegra/include/drivers/mce.h
@@ -4,8 +4,8 @@
 * SPDX-License-Identifier: BSD-3-Clause
 */

-#ifndef __MCE_H__
-#define __MCE_H__
+#ifndef MCE_H
+#define MCE_H

 #include <mmio.h>
 #include <tegra_def.h>
@@ -73,4 +73,4 @@ __dead2 void mce_enter_ccplex_state(uint32_t state_idx);
 void mce_update_cstate_info(const mce_cstate_info_t *cstate);
 void mce_verify_firmware_version(void);

-#endif /* __MCE_H__ */
+#endif /* MCE_H */
--- a/plat/nvidia/tegra/include/drivers/memctrl.h
+++ b/plat/nvidia/tegra/include/drivers/memctrl.h
@@ -4,8 +4,8 @@
 * SPDX-License-Identifier: BSD-3-Clause
 */

-#ifndef __MEMCTRL_H__
-#define __MEMCTRL_H__
+#ifndef MEMCTRL_H
+#define MEMCTRL_H

 void tegra_memctrl_setup(void);
 void tegra_memctrl_restore_settings(void);
@@ -14,4 +14,4 @@ void tegra_memctrl_tzram_setup(uint64_t phys_base, uint32_t size_in_bytes);
 void tegra_memctrl_videomem_setup(uint64_t phys_base, uint32_t size_in_bytes);
 void tegra_memctrl_disable_ahb_redirection(void);

-#endif /* __MEMCTRL_H__ */
+#endif /* MEMCTRL_H */
--- a/plat/nvidia/tegra/include/drivers/memctrl_v1.h
+++ b/plat/nvidia/tegra/include/drivers/memctrl_v1.h
@@ -4,8 +4,8 @@
 * SPDX-License-Identifier: BSD-3-Clause
 */

-#ifndef __MEMCTRLV1_H__
-#define __MEMCTRLV1_H__
+#ifndef MEMCTRL_V1_H
+#define MEMCTRL_V1_H

 #include <mmio.h>
 #include <tegra_def.h>
@@ -53,4 +53,4 @@ static inline void tegra_mc_write_32(uint32_t off, uint32_t val)
 	mmio_write_32(TEGRA_MC_BASE + off, val);
 }

-#endif /* __MEMCTRLV1_H__ */
+#endif /* MEMCTRL_V1_H */
--- a/plat/nvidia/tegra/include/drivers/memctrl_v2.h
+++ b/plat/nvidia/tegra/include/drivers/memctrl_v2.h
@@ -4,8 +4,8 @@
 * SPDX-License-Identifier: BSD-3-Clause
 */

-#ifndef __MEMCTRLV2_H__
-#define __MEMCTRLV2_H__
+#ifndef MEMCTRL_V2_H
+#define MEMCTRL_V2_H

 #include <tegra_def.h>

@@ -475,4 +475,4 @@ tegra_mc_settings_t *tegra_get_mc_settings(void);

 #endif /* __ASSMEBLY__ */

-#endif /* __MEMCTRLV2_H__ */
+#endif /* MEMCTRL_V2_H */
--- a/plat/nvidia/tegra/include/drivers/pmc.h
+++ b/plat/nvidia/tegra/include/drivers/pmc.h
@@ -4,8 +4,8 @@
 * SPDX-License-Identifier: BSD-3-Clause
 */

-#ifndef __PMC_H__
-#define __PMC_H__
+#ifndef PMC_H
+#define PMC_H

 #include <mmio.h>
 #include <tegra_def.h>
@@ -40,4 +40,4 @@ void tegra_pmc_lock_cpu_vectors(void);
 void tegra_pmc_cpu_on(int32_t cpu);
 __dead2 void tegra_pmc_system_reset(void);

-#endif /* __PMC_H__ */
+#endif /* PMC_H */
--- a/plat/nvidia/tegra/include/drivers/smmu.h
+++ b/plat/nvidia/tegra/include/drivers/smmu.h
@@ -4,8 +4,8 @@
 * SPDX-License-Identifier: BSD-3-Clause
 */

-#ifndef __SMMU_H
-#define __SMMU_H
+#ifndef SMMU_H
+#define SMMU_H

 #include <memctrl_v2.h>
 #include <mmio.h>
@@ -705,4 +705,4 @@ void tegra_smmu_init(void);
 void tegra_smmu_save_context(uint64_t smmu_ctx_addr);
 smmu_regs_t *plat_get_smmu_ctx(void);

-#endif /*__SMMU_H */
+#endif /* SMMU_H */
--- a/plat/nvidia/tegra/include/plat_macros.S
+++ b/plat/nvidia/tegra/include/plat_macros.S
@@ -4,8 +4,8 @@
 * SPDX-License-Identifier: BSD-3-Clause
 */

-#ifndef __PLAT_MACROS_S__
-#define __PLAT_MACROS_S__
+#ifndef PLAT_MACROS_S
+#define PLAT_MACROS_S

 #include <tegra_def.h>

@@ -57,4 +57,4 @@ spacer:
 1:
 .endm

-#endif /* __PLAT_MACROS_S__ */
+#endif /* PLAT_MACROS_S */
--- a/plat/nvidia/tegra/include/platform_def.h
+++ b/plat/nvidia/tegra/include/platform_def.h
@@ -4,8 +4,8 @@
 * SPDX-License-Identifier: BSD-3-Clause
 */

-#ifndef __PLATFORM_DEF_H__
-#define __PLATFORM_DEF_H__
+#ifndef PLATFORM_DEF_H
+#define PLATFORM_DEF_H

 #include <arch.h>
 #include <common_def.h>
@@ -65,4 +65,4 @@
 #define CACHE_WRITEBACK_SHIFT		6
 #define CACHE_WRITEBACK_GRANULE		(U(1) << CACHE_WRITEBACK_SHIFT)

-#endif /* __PLATFORM_DEF_H__ */
+#endif /* PLATFORM_DEF_H */
--- a/plat/nvidia/tegra/include/t132/tegra_def.h
+++ b/plat/nvidia/tegra/include/t132/tegra_def.h
@@ -4,8 +4,8 @@
 * SPDX-License-Identifier: BSD-3-Clause
 */

-#ifndef __TEGRA_DEF_H__
-#define __TEGRA_DEF_H__
+#ifndef TEGRA_DEF_H
+#define TEGRA_DEF_H

 #include <utils_def.h>

@@ -99,4 +99,4 @@
 #define TEGRA_TZRAM_BASE		U(0x7C010000)
 #define TEGRA_TZRAM_SIZE		U(0x10000)

-#endif /* __TEGRA_DEF_H__ */
+#endif /* TEGRA_DEF_H */
--- a/plat/nvidia/tegra/include/t186/tegra_def.h
+++ b/plat/nvidia/tegra/include/t186/tegra_def.h
@@ -4,8 +4,8 @@
 * SPDX-License-Identifier: BSD-3-Clause
 */

-#ifndef __TEGRA_DEF_H__
-#define __TEGRA_DEF_H__
+#ifndef TEGRA_DEF_H
+#define TEGRA_DEF_H

 #include <utils_def.h>

@@ -247,4 +247,4 @@
 #define TEGRA_TZRAM_BASE		U(0x30000000)
 #define TEGRA_TZRAM_SIZE		U(0x40000)

-#endif /* __TEGRA_DEF_H__ */
+#endif /* TEGRA_DEF_H */
--- a/plat/nvidia/tegra/include/t210/tegra_def.h
+++ b/plat/nvidia/tegra/include/t210/tegra_def.h
@@ -4,8 +4,8 @@
 * SPDX-License-Identifier: BSD-3-Clause
 */

-#ifndef __TEGRA_DEF_H__
-#define __TEGRA_DEF_H__
+#ifndef TEGRA_DEF_H
+#define TEGRA_DEF_H

 #include <utils_def.h>

@@ -124,4 +124,4 @@
 #define TEGRA_TZRAM_BASE		U(0x7C010000)
 #define TEGRA_TZRAM_SIZE		U(0x10000)

-#endif /* __TEGRA_DEF_H__ */
+#endif /* TEGRA_DEF_H */
--- a/plat/nvidia/tegra/include/tegra_platform.h
+++ b/plat/nvidia/tegra/include/tegra_platform.h
@@ -4,8 +4,8 @@
 * SPDX-License-Identifier: BSD-3-Clause
 */

-#ifndef __TEGRA_PLATFORM_H__
-#define __TEGRA_PLATFORM_H__
+#ifndef TEGRA_PLATFORM_H
+#define TEGRA_PLATFORM_H

 #include <cdefs.h>

@@ -31,4 +31,4 @@ uint8_t tegra_platform_is_qt(void);
 uint8_t tegra_platform_is_emulation(void);
 uint8_t tegra_platform_is_fpga(void);

-#endif /* __TEGRA_PLATFORM_H__ */
+#endif /* TEGRA_PLATFORM_H */