diff --git a/plat/layerscape/board/ls1043/ls1043_psci.c b/plat/layerscape/board/ls1043/ls1043_psci.c
index d6429c326103d842dc3d6411bfff90401d94984a..8e282cbad845b5079372f70a0fb7b03c3453d9e9 100644
--- a/plat/layerscape/board/ls1043/ls1043_psci.c
+++ b/plat/layerscape/board/ls1043/ls1043_psci.c
@@ -66,12 +66,12 @@ static void ls1043_reset_core(int core_pos)
 	dsb();
 	/* enable core soft reset */
 	mmio_write_32(LS_SCFG_BASE + LS_SCFG_CORESRENCR_OFFSET,
-		      htobe32(1 << 31));
+		      htobe32(1U << 31));
 	dsb();
 	isb();
 	/* reset core */
 	mmio_write_32(LS_SCFG_BASE + LS_SCFG_CORE0_SFT_RST_OFFSET +
-			core_pos * 4, htobe32(1 << 31));
+			core_pos * 4, htobe32(1U << 31));
 	mdelay(10);
 }
 
diff --git a/plat/layerscape/board/ls1043/ls_gic.c b/plat/layerscape/board/ls1043/ls_gic.c
index 3d8b262d29733f82bcbc5cc7065fc39165c3d507..cba55caffd29812649d1e5f9e44246d6d44e5cbc 100644
--- a/plat/layerscape/board/ls1043/ls_gic.c
+++ b/plat/layerscape/board/ls1043/ls_gic.c
@@ -35,7 +35,7 @@ void get_gic_offset(uint32_t *gicc_base, uint32_t *gicd_base)
 			soc_dev_id == (SVR_LS1043AE << 8)) &&
 			((val & 0xff) == REV1_1)) {
 		val = be32toh(mmio_read_32((uintptr_t)gic_align));
-		if (val & (1 << GIC_ADDR_BIT)) {
+		if (val & (1U << GIC_ADDR_BIT)) {
 			*gicc_base = GICC_BASE;
 			*gicd_base = GICD_BASE;
 		} else {
diff --git a/plat/layerscape/common/include/soc.h b/plat/layerscape/common/include/soc.h
index 76c34189312ed28245db12fc4b29f31388b2239b..a5dc8557b3ee76eafdb191fd6cd6e78e9143211f 100644
--- a/plat/layerscape/common/include/soc.h
+++ b/plat/layerscape/common/include/soc.h
@@ -9,9 +9,9 @@
 
 #include <stdint.h>
 
-#define SVR_WO_E		0xFFFFFE
-#define SVR_LS1043A		0x879204
-#define SVR_LS1043AE		0x879200
+#define SVR_WO_E		0xFFFFFEu
+#define SVR_LS1043A		0x879204u
+#define SVR_LS1043AE		0x879200u
 
 void get_gic_offset(uint32_t *gicc_base, uint32_t *gicd_base);