Merge "Switch AARCH32/AARCH64 to __aarch64__" into integration

plat/qemu/qemu_bl2_mem_params_desc.c

@@ -35,7 +35,7 @@ static bl_mem_params_node_t bl2_mem_params_descs[] = {
 	  .next_handoff_image_id = INVALID_IMAGE_ID,
 	},
 #else /* EL3_PAYLOAD_BASE */
-#ifdef AARCH64
+#ifdef __aarch64__
 	/* Fill BL31 related information */
 	{ .image_id = BL31_IMAGE_ID,
 
@@ -59,10 +59,10 @@ static bl_mem_params_node_t bl2_mem_params_descs[] = {
 	  .next_handoff_image_id = BL33_IMAGE_ID,
 # endif
 	},
-#endif /* AARCH64 */
+#endif /* __aarch64__ */
 # ifdef QEMU_LOAD_BL32
 
-#ifdef AARCH64
+#ifdef __aarch64__
 #define BL32_EP_ATTRIBS		(SECURE | EXECUTABLE)
 #define BL32_IMG_ATTRIBS	0
 #else

plat/qemu/qemu_bl2_setup.c

@@ -81,10 +81,10 @@ void bl2_platform_setup(void)
 	/* TODO Initialize timer */
 }
 
-#ifdef AARCH32
-#define QEMU_CONFIGURE_BL2_MMU(...)	qemu_configure_mmu_svc_mon(__VA_ARGS__)
-#else
+#ifdef __aarch64__
 #define QEMU_CONFIGURE_BL2_MMU(...)	qemu_configure_mmu_el1(__VA_ARGS__)
+#else
+#define QEMU_CONFIGURE_BL2_MMU(...)	qemu_configure_mmu_svc_mon(__VA_ARGS__)
 #endif
 
 void bl2_plat_arch_setup(void)
@@ -101,7 +101,7 @@ void bl2_plat_arch_setup(void)
  ******************************************************************************/
 static uint32_t qemu_get_spsr_for_bl32_entry(void)
 {
-#ifdef AARCH64
+#ifdef __aarch64__
 	/*
 	 * The Secure Payload Dispatcher service is responsible for
 	 * setting the SPSR prior to entry into the BL3-2 image.
@@ -119,7 +119,7 @@ static uint32_t qemu_get_spsr_for_bl32_entry(void)
 static uint32_t qemu_get_spsr_for_bl33_entry(void)
 {
 	uint32_t spsr;
-#ifdef AARCH64
+#ifdef __aarch64__
 	unsigned int mode;
 
 	/* Figure out what mode we enter the non-secure world in */

plat/qemu/qemu_common.c

@@ -132,11 +132,11 @@ static const mmap_region_t plat_qemu_mmap[] = {
 	}
 
 /* Define EL1 and EL3 variants of the function initialising the MMU */
-#ifdef AARCH32
-DEFINE_CONFIGURE_MMU_EL(svc_mon)
-#else
+#ifdef __aarch64__
 DEFINE_CONFIGURE_MMU_EL(el1)
 DEFINE_CONFIGURE_MMU_EL(el3)
+#else
+DEFINE_CONFIGURE_MMU_EL(svc_mon)
 #endif
 
 

plat/rockchip/common/include/plat_private.h

@@ -60,24 +60,24 @@ extern uint32_t __sram_incbin_real_end;
 /******************************************************************************
  * Function and variable prototypes
  *****************************************************************************/
-#ifdef AARCH32
-void plat_configure_mmu_svc_mon(unsigned long total_base,
+#ifdef __aarch64__
+void plat_configure_mmu_el3(unsigned long total_base,
 			    unsigned long total_size,
 			    unsigned long,
 			    unsigned long,
 			    unsigned long,
 			    unsigned long);
 
-void rockchip_plat_mmu_svc_mon(void);
+void rockchip_plat_mmu_el3(void);
 #else
-void plat_configure_mmu_el3(unsigned long total_base,
+void plat_configure_mmu_svc_mon(unsigned long total_base,
 				unsigned long total_size,
 				unsigned long,
 				unsigned long,
 				unsigned long,
 				unsigned long);
 
-void rockchip_plat_mmu_el3(void);
+void rockchip_plat_mmu_svc_mon(void);
 #endif
 
 void plat_cci_init(void);

services/std_svc/sdei/sdei_private.h

@@ -22,7 +22,7 @@
 #include <services/sdei.h>
 #include <setjmp.h>
 
-#ifdef AARCH32
+#ifndef __aarch64__
 # error SDEI is implemented only for AArch64 systems
 #endif