diff --git a/bl32/tsp/tsp_main.c b/bl32/tsp/tsp_main.c index e042d96a09b788b091d87cec3e84f2ad595da358..407ed47881fc49dee9d46e0f4fc01eb7d19c70aa 100644 --- a/bl32/tsp/tsp_main.c +++ b/bl32/tsp/tsp_main.c @@ -38,7 +38,7 @@ work_statistics_t tsp_stats[PLATFORM_CORE_COUNT]; * linker symbol __BL32_END__. Use these addresses to compute the TSP image * size. ******************************************************************************/ -#define BL32_TOTAL_LIMIT (unsigned long)(&__BL32_END__) +#define BL32_TOTAL_LIMIT BL32_END #define BL32_TOTAL_SIZE (BL32_TOTAL_LIMIT - (unsigned long) BL32_BASE) static tsp_args_t *set_smc_args(uint64_t arg0, diff --git a/docs/porting-guide.rst b/docs/porting-guide.rst index 716d4467e0d44733f83d27d29d07b119203d38fd..655c7204fc6ec8cec097b348daf734e008b6eabe 100644 --- a/docs/porting-guide.rst +++ b/docs/porting-guide.rst @@ -103,20 +103,13 @@ File : platform\_def.h [mandatory] ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Each platform must ensure that a header file of this name is in the system -include path with the following constants defined. This may require updating the -list of ``PLAT_INCLUDES`` in the ``platform.mk`` file. In the Arm development -platforms, this file is found in ``plat/arm/board/<plat_name>/include/``. +include path with the following constants defined. This will require updating +the list of ``PLAT_INCLUDES`` in the ``platform.mk`` file. Platform ports may optionally use the file `include/plat/common/common\_def.h`_, which provides typical values for some of the constants below. These values are likely to be suitable for all platform ports. -Platform ports that want to be aligned with standard Arm platforms (for example -FVP and Juno) may also use `include/plat/arm/common/arm\_def.h`_, which provides -standard values for some of the constants below. However, this requires the -platform port to define additional platform porting constants in -``platform_def.h``. These additional constants are not documented here. - - **#define : PLATFORM\_LINKER\_FORMAT** Defines the linker format used by the platform, for example diff --git a/include/common/bl_common.h b/include/common/bl_common.h index 57c117457b22e2e4b602aa1730a2e40b9d3dd5ea..fd7656eb5d5c820b5acc55f499a3cc23912d85b1 100644 --- a/include/common/bl_common.h +++ b/include/common/bl_common.h @@ -69,40 +69,37 @@ * BL images */ #if SEPARATE_CODE_AND_RODATA -IMPORT_SYM(unsigned long, __TEXT_START__, BL_CODE_BASE); -IMPORT_SYM(unsigned long, __TEXT_END__, BL_CODE_END); -IMPORT_SYM(unsigned long, __RODATA_START__, BL_RO_DATA_BASE); -IMPORT_SYM(unsigned long, __RODATA_END__, BL_RO_DATA_END); +IMPORT_SYM(uintptr_t, __TEXT_START__, BL_CODE_BASE); +IMPORT_SYM(uintptr_t, __TEXT_END__, BL_CODE_END); +IMPORT_SYM(uintptr_t, __RODATA_START__, BL_RO_DATA_BASE); +IMPORT_SYM(uintptr_t, __RODATA_END__, BL_RO_DATA_END); #else -IMPORT_SYM(unsigned long, __RO_START__, BL_CODE_BASE); -IMPORT_SYM(unsigned long, __RO_END__, BL_CODE_END); +IMPORT_SYM(uintptr_t, __RO_START__, BL_CODE_BASE); +IMPORT_SYM(uintptr_t, __RO_END__, BL_CODE_END); #endif #if defined(IMAGE_BL1) -IMPORT_SYM(uintptr_t, __BL1_ROM_END__, BL1_ROM_END); +IMPORT_SYM(uintptr_t, __BL1_ROM_END__, BL1_ROM_END); -IMPORT_SYM(uintptr_t, __BL1_RAM_START__, BL1_RAM_BASE); -IMPORT_SYM(uintptr_t, __BL1_RAM_END__, BL1_RAM_LIMIT); +IMPORT_SYM(uintptr_t, __BL1_RAM_START__, BL1_RAM_BASE); +IMPORT_SYM(uintptr_t, __BL1_RAM_END__, BL1_RAM_LIMIT); #elif defined(IMAGE_BL2) -IMPORT_SYM(unsigned long, __BL2_END__, BL2_END); +IMPORT_SYM(uintptr_t, __BL2_END__, BL2_END); #elif defined(IMAGE_BL2U) -IMPORT_SYM(unsigned long, __BL2U_END__, BL2U_END); +IMPORT_SYM(uintptr_t, __BL2U_END__, BL2U_END); #elif defined(IMAGE_BL31) -IMPORT_SYM(unsigned long, __BL31_START__, BL31_START); -IMPORT_SYM(unsigned long, __BL31_END__, BL31_END); +IMPORT_SYM(uintptr_t, __BL31_START__, BL31_START); +IMPORT_SYM(uintptr_t, __BL31_END__, BL31_END); #elif defined(IMAGE_BL32) -IMPORT_SYM(unsigned long, __BL32_END__, BL32_END); +IMPORT_SYM(uintptr_t, __BL32_END__, BL32_END); #endif /* IMAGE_BLX */ /* The following symbols are only exported from the BL2 at EL3 linker script. */ #if BL2_IN_XIP_MEM && defined(IMAGE_BL2) -extern uintptr_t __BL2_ROM_END__; -#define BL2_ROM_END (uintptr_t)(&__BL2_ROM_END__) +IMPORT_SYM(uintptr_t, __BL2_ROM_END__, BL2_ROM_END); -extern uintptr_t __BL2_RAM_START__; -extern uintptr_t __BL2_RAM_END__; -#define BL2_RAM_BASE (uintptr_t)(&__BL2_RAM_START__) -#define BL2_RAM_LIMIT (uintptr_t)(&__BL2_RAM_END__) +IMPORT_SYM(uintptr_t, __BL2_RAM_START__, BL2_RAM_BASE); +IMPORT_SYM(uintptr_t, __BL2_RAM_END__, BL2_RAM_END); #endif /* BL2_IN_XIP_MEM */ /* @@ -113,8 +110,8 @@ extern uintptr_t __BL2_RAM_END__; * page-aligned addresses. */ #if USE_COHERENT_MEM -IMPORT_SYM(unsigned long, __COHERENT_RAM_START__, BL_COHERENT_RAM_BASE); -IMPORT_SYM(unsigned long, __COHERENT_RAM_END__, BL_COHERENT_RAM_END); +IMPORT_SYM(uintptr_t, __COHERENT_RAM_START__, BL_COHERENT_RAM_BASE); +IMPORT_SYM(uintptr_t, __COHERENT_RAM_END__, BL_COHERENT_RAM_END); #endif /******************************************************************************* diff --git a/lib/xlat_tables_v2/aarch64/enable_mmu.S b/lib/xlat_tables_v2/aarch64/enable_mmu.S index 07e7be1ec22cfadc2b8b233223e0ec501c9fdc23..9f075e44fe30328f93fd985b6ed4decd73364c4a 100644 --- a/lib/xlat_tables_v2/aarch64/enable_mmu.S +++ b/lib/xlat_tables_v2/aarch64/enable_mmu.S @@ -86,9 +86,10 @@ .endm /* - * Define MMU-enabling functions for EL1 and EL3: + * Define MMU-enabling functions for EL1, EL2 and EL3: * * enable_mmu_direct_el1 + * enable_mmu_direct_el2 * enable_mmu_direct_el3 */ define_mmu_enable_func 1 diff --git a/plat/arm/common/tsp/arm_tsp_setup.c b/plat/arm/common/tsp/arm_tsp_setup.c index 2965ccd40cb44f640411f7281ada2f0a102407b3..a3dfa1e1d306bdb48c358178c2ac4dc7d3c08d70 100644 --- a/plat/arm/common/tsp/arm_tsp_setup.c +++ b/plat/arm/common/tsp/arm_tsp_setup.c @@ -15,8 +15,6 @@ #include <drivers/console.h> #include <plat/arm/common/plat_arm.h> -#define BL32_END (unsigned long)(&__BL32_END__) - /* Weak definitions may be overridden in specific ARM standard platform */ #pragma weak tsp_early_platform_setup #pragma weak tsp_platform_setup diff --git a/plat/arm/css/sgi/sgi_plat.c b/plat/arm/css/sgi/sgi_plat.c index 83ca30c87e57c29f6b4df78850f093ee85cc2350..42eff866a5f0fbc112e1394d8ba8e3ed7d1d1c5f 100644 --- a/plat/arm/css/sgi/sgi_plat.c +++ b/plat/arm/css/sgi/sgi_plat.c @@ -15,23 +15,6 @@ #include <plat/common/platform.h> #include <services/secure_partition.h> -#if USE_COHERENT_MEM -/* - * The next 2 constants identify the extents of the coherent memory region. - * These addresses are used by the MMU setup code and therefore they must be - * page-aligned. It is the responsibility of the linker script to ensure that - * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols - * refer to page-aligned addresses. - */ -#define BL1_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__) -#define BL1_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__) -#define BL2_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__) -#define BL2_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__) - -#define BL31_COHERENT_RAM_BASE (uintptr_t)(&__COHERENT_RAM_START__) -#define BL31_COHERENT_RAM_LIMIT (uintptr_t)(&__COHERENT_RAM_END__) -#endif - #define SGI_MAP_FLASH0_RO MAP_REGION_FLAT(V2M_FLASH0_BASE,\ V2M_FLASH0_SIZE, \ MT_DEVICE | MT_RO | MT_SECURE) diff --git a/plat/hisilicon/hikey/hikey_bl2_setup.c b/plat/hisilicon/hikey/hikey_bl2_setup.c index b8723737365240fdf591d57466b1195cc3e9e102..c57fea90d30541e671e9bf230104e2bbe0f934f4 100644 --- a/plat/hisilicon/hikey/hikey_bl2_setup.c +++ b/plat/hisilicon/hikey/hikey_bl2_setup.c @@ -29,26 +29,7 @@ #include <hisi_sram_map.h> #include "hikey_private.h" -/* - * The next 2 constants identify the extents of the code & RO data region. - * These addresses are used by the MMU setup code and therefore they must be - * page-aligned. It is the responsibility of the linker script to ensure that - * __RO_START__ and __RO_END__ linker symbols refer to page-aligned addresses. - */ -#define BL2_RO_BASE (unsigned long)(&__RO_START__) -#define BL2_RO_LIMIT (unsigned long)(&__RO_END__) - -#define BL2_RW_BASE (BL2_RO_LIMIT) - -/* - * The next 2 constants identify the extents of the coherent memory region. - * These addresses are used by the MMU setup code and therefore they must be - * page-aligned. It is the responsibility of the linker script to ensure that - * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols refer to - * page-aligned addresses. - */ -#define BL2_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__) -#define BL2_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__) +#define BL2_RW_BASE (BL_CODE_END) static meminfo_t bl2_el3_tzram_layout; static console_pl011_t console; @@ -295,10 +276,10 @@ void bl2_el3_plat_arch_setup(void) { hikey_init_mmu_el3(bl2_el3_tzram_layout.total_base, bl2_el3_tzram_layout.total_size, - BL2_RO_BASE, - BL2_RO_LIMIT, - BL2_COHERENT_RAM_BASE, - BL2_COHERENT_RAM_LIMIT); + BL_CODE_BASE, + BL_CODE_END, + BL_COHERENT_RAM_BASE, + BL_COHERENT_RAM_END); } void bl2_platform_setup(void) diff --git a/plat/hisilicon/hikey/hikey_bl31_setup.c b/plat/hisilicon/hikey/hikey_bl31_setup.c index b2dcb619645e4141f7c2ed3fda753ec0c2b5c780..0326e9f3dec71dd4c7bc5e453a15844e3e6b3d5e 100644 --- a/plat/hisilicon/hikey/hikey_bl31_setup.c +++ b/plat/hisilicon/hikey/hikey_bl31_setup.c @@ -25,25 +25,6 @@ #include "hikey_private.h" -/* - * The next 2 constants identify the extents of the code & RO data region. - * These addresses are used by the MMU setup code and therefore they must be - * page-aligned. It is the responsibility of the linker script to ensure that - * __RO_START__ and __RO_END__ linker symbols refer to page-aligned addresses. - */ -#define BL31_RO_BASE (unsigned long)(&__RO_START__) -#define BL31_RO_LIMIT (unsigned long)(&__RO_END__) - -/* - * The next 2 constants identify the extents of the coherent memory region. - * These addresses are used by the MMU setup code and therefore they must be - * page-aligned. It is the responsibility of the linker script to ensure that - * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols refer to - * page-aligned addresses. - */ -#define BL31_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__) -#define BL31_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__) - static entry_point_info_t bl32_ep_info; static entry_point_info_t bl33_ep_info; static console_pl011_t console; @@ -135,10 +116,10 @@ void bl31_plat_arch_setup(void) { hikey_init_mmu_el3(BL31_BASE, BL31_LIMIT - BL31_BASE, - BL31_RO_BASE, - BL31_RO_LIMIT, - BL31_COHERENT_RAM_BASE, - BL31_COHERENT_RAM_LIMIT); + BL_CODE_BASE, + BL_CODE_END, + BL_COHERENT_RAM_BASE, + BL_COHERENT_RAM_END); } /* Initialize EDMAC controller with non-secure mode. */ diff --git a/plat/hisilicon/hikey/platform.mk b/plat/hisilicon/hikey/platform.mk index 6d077f746428fcabb5942a200bd5e40e20ce353e..99887eeef85b136fe28ca94b89aee8ce77cba6da 100644 --- a/plat/hisilicon/hikey/platform.mk +++ b/plat/hisilicon/hikey/platform.mk @@ -45,8 +45,7 @@ endif USE_COHERENT_MEM := 1 -PLAT_INCLUDES := -Iinclude/common/tbbr \ - -Iplat/hisilicon/hikey/include +PLAT_INCLUDES := -Iplat/hisilicon/hikey/include PLAT_BL_COMMON_SOURCES := drivers/arm/pl011/aarch64/pl011_console.S \ lib/xlat_tables/aarch64/xlat_tables.c \ diff --git a/plat/hisilicon/hikey960/hikey960_bl2_setup.c b/plat/hisilicon/hikey960/hikey960_bl2_setup.c index 788392db70b129a5ce5a13fc331cb4f645ca2716..7102de85b09a58377ab6e4bb3c3d1eb3445cf4ca 100644 --- a/plat/hisilicon/hikey960/hikey960_bl2_setup.c +++ b/plat/hisilicon/hikey960/hikey960_bl2_setup.c @@ -28,26 +28,7 @@ #include "hikey960_def.h" #include "hikey960_private.h" -/* - * The next 2 constants identify the extents of the code & RO data region. - * These addresses are used by the MMU setup code and therefore they must be - * page-aligned. It is the responsibility of the linker script to ensure that - * __RO_START__ and __RO_END__ linker symbols refer to page-aligned addresses. - */ -#define BL2_RO_BASE (unsigned long)(&__RO_START__) -#define BL2_RO_LIMIT (unsigned long)(&__RO_END__) - -#define BL2_RW_BASE (BL2_RO_LIMIT) - -/* - * The next 2 constants identify the extents of the coherent memory region. - * These addresses are used by the MMU setup code and therefore they must be - * page-aligned. It is the responsibility of the linker script to ensure that - * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols refer to - * page-aligned addresses. - */ -#define BL2_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__) -#define BL2_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__) +#define BL2_RW_BASE (BL_CODE_END) static meminfo_t bl2_el3_tzram_layout; static console_pl011_t console; @@ -312,10 +293,10 @@ void bl2_el3_plat_arch_setup(void) { hikey960_init_mmu_el3(bl2_el3_tzram_layout.total_base, bl2_el3_tzram_layout.total_size, - BL2_RO_BASE, - BL2_RO_LIMIT, - BL2_COHERENT_RAM_BASE, - BL2_COHERENT_RAM_LIMIT); + BL_CODE_BASE, + BL_CODE_END, + BL_COHERENT_RAM_BASE, + BL_COHERENT_RAM_END); } void bl2_platform_setup(void) diff --git a/plat/hisilicon/hikey960/hikey960_bl31_setup.c b/plat/hisilicon/hikey960/hikey960_bl31_setup.c index c3fcc38046552e24850117e6d7c8967a1ca4cd96..5d70dbfd795ff917e23872c7c75b01ee10faed50 100644 --- a/plat/hisilicon/hikey960/hikey960_bl31_setup.c +++ b/plat/hisilicon/hikey960/hikey960_bl31_setup.c @@ -27,25 +27,6 @@ #include "hikey960_def.h" #include "hikey960_private.h" -/* - * The next 2 constants identify the extents of the code & RO data region. - * These addresses are used by the MMU setup code and therefore they must be - * page-aligned. It is the responsibility of the linker script to ensure that - * __RO_START__ and __RO_END__ linker symbols refer to page-aligned addresses. - */ -#define BL31_RO_BASE (unsigned long)(&__RO_START__) -#define BL31_RO_LIMIT (unsigned long)(&__RO_END__) - -/* - * The next 2 constants identify the extents of the coherent memory region. - * These addresses are used by the MMU setup code and therefore they must be - * page-aligned. It is the responsibility of the linker script to ensure that - * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols refer to - * page-aligned addresses. - */ -#define BL31_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__) -#define BL31_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__) - static entry_point_info_t bl32_ep_info; static entry_point_info_t bl33_ep_info; static console_pl011_t console; @@ -140,10 +121,10 @@ void bl31_plat_arch_setup(void) { hikey960_init_mmu_el3(BL31_BASE, BL31_LIMIT - BL31_BASE, - BL31_RO_BASE, - BL31_RO_LIMIT, - BL31_COHERENT_RAM_BASE, - BL31_COHERENT_RAM_LIMIT); + BL_CODE_BASE, + BL_CODE_END, + BL_COHERENT_RAM_BASE, + BL_COHERENT_RAM_END); } static void hikey960_edma_init(void) diff --git a/plat/hisilicon/hikey960/platform.mk b/plat/hisilicon/hikey960/platform.mk index ff008e77a08adfb095c172befec7f9b155c26002..8ff303fdc86211042c5cc16e2b17004271baddff 100644 --- a/plat/hisilicon/hikey960/platform.mk +++ b/plat/hisilicon/hikey960/platform.mk @@ -40,8 +40,7 @@ endif USE_COHERENT_MEM := 1 -PLAT_INCLUDES := -Iinclude/common/tbbr \ - -Iplat/hisilicon/hikey960/include +PLAT_INCLUDES := -Iplat/hisilicon/hikey960/include PLAT_BL_COMMON_SOURCES := drivers/arm/pl011/aarch64/pl011_console.S \ drivers/delay_timer/delay_timer.c \ diff --git a/plat/hisilicon/poplar/bl2_plat_setup.c b/plat/hisilicon/poplar/bl2_plat_setup.c index ff8e107dbf1f59a12c128d2dbe2250914b6b2f25..11403b07fe1216d87d5c45859332c3c03125b27f 100644 --- a/plat/hisilicon/poplar/bl2_plat_setup.c +++ b/plat/hisilicon/poplar/bl2_plat_setup.c @@ -24,14 +24,6 @@ #include "hi3798cv200.h" #include "plat_private.h" -/* Memory ranges for code and read only data sections */ -#define BL2_RO_BASE (unsigned long)(&__RO_START__) -#define BL2_RO_LIMIT (unsigned long)(&__RO_END__) - -/* Memory ranges for coherent memory section */ -#define BL2_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__) -#define BL2_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__) - static meminfo_t bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE); static console_pl011_t console; @@ -206,10 +198,10 @@ void bl2_plat_arch_setup(void) { plat_configure_mmu_el1(bl2_tzram_layout.total_base, bl2_tzram_layout.total_size, - BL2_RO_BASE, - BL2_RO_LIMIT, - BL2_COHERENT_RAM_BASE, - BL2_COHERENT_RAM_LIMIT); + BL_CODE_BASE, + BL_CODE_END, + BL_COHERENT_RAM_BASE, + BL_COHERENT_RAM_END); } void bl2_platform_setup(void) diff --git a/plat/hisilicon/poplar/bl31_plat_setup.c b/plat/hisilicon/poplar/bl31_plat_setup.c index 69911e8d5ecc3eecb98755a70149b46f983bbd72..f81078f09e51ee208b92afb9d2631ef11549132b 100644 --- a/plat/hisilicon/poplar/bl31_plat_setup.c +++ b/plat/hisilicon/poplar/bl31_plat_setup.c @@ -25,14 +25,6 @@ #include "hi3798cv200.h" #include "plat_private.h" -/* Memory ranges for code and RO data sections */ -#define BL31_RO_BASE (unsigned long)(&__RO_START__) -#define BL31_RO_LIMIT (unsigned long)(&__RO_END__) - -/* Memory ranges for coherent memory section */ -#define BL31_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__) -#define BL31_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__) - #define TZPC_SEC_ATTR_CTRL_VALUE (0x9DB98D45) static entry_point_info_t bl32_image_ep_info; @@ -133,10 +125,10 @@ void bl31_plat_arch_setup(void) { plat_configure_mmu_el3(BL31_BASE, (BL31_LIMIT - BL31_BASE), - BL31_RO_BASE, - BL31_RO_LIMIT, - BL31_COHERENT_RAM_BASE, - BL31_COHERENT_RAM_LIMIT); + BL_CODE_BASE, + BL_CODE_END, + BL_COHERENT_RAM_BASE, + BL_COHERENT_RAM_END); INFO("Boot BL33 from 0x%lx for %lu Bytes\n", bl33_image_ep_info.pc, bl33_image_ep_info.args.arg2); diff --git a/plat/hisilicon/poplar/platform.mk b/plat/hisilicon/poplar/platform.mk index eca14125e15588d12a0150b507327617291503b5..a1535a4d4b851e241bd82ff3ca9bf21fda16e7ba 100644 --- a/plat/hisilicon/poplar/platform.mk +++ b/plat/hisilicon/poplar/platform.mk @@ -53,8 +53,7 @@ PLAT_PL061_MAX_GPIOS := 104 $(eval $(call add_define,PLAT_PL061_MAX_GPIOS)) PLAT_INCLUDES := -Iplat/hisilicon/poplar/include \ - -Iplat/hisilicon/poplar \ - -Iinclude/common/tbbr + -Iplat/hisilicon/poplar PLAT_BL_COMMON_SOURCES := \ lib/xlat_tables/aarch64/xlat_tables.c \ diff --git a/plat/imx/imx7/warp7/platform.mk b/plat/imx/imx7/warp7/platform.mk index f7bd4ae5ba153d046b48e49fb7b2327ff14ccf94..f29f7799a7b80f2e5d64259b87c2d1410f72e6fd 100644 --- a/plat/imx/imx7/warp7/platform.mk +++ b/plat/imx/imx7/warp7/platform.mk @@ -21,7 +21,6 @@ endif # Platform PLAT_INCLUDES := -Idrivers/imx/uart \ - -Iinclude/common/tbbr \ -Iplat/imx/common/include/ \ -Iplat/imx/imx7/warp7/include \ -Idrivers/imx/timer \ diff --git a/plat/layerscape/board/ls1043/platform.mk b/plat/layerscape/board/ls1043/platform.mk index 91a14a445ced300a50b4ebc8e5960d83f06cddf4..2e0e59bd5c34bdc5cf06c8f9799603231b14085d 100644 --- a/plat/layerscape/board/ls1043/platform.mk +++ b/plat/layerscape/board/ls1043/platform.mk @@ -23,8 +23,6 @@ LS1043_SECURITY_SOURCES := plat/layerscape/common/ls_tzc380.c \ PLAT_INCLUDES := -Iplat/layerscape/board/ls1043/include \ -Iplat/layerscape/common/include \ - -Iinclude/lib - PLAT_BL_COMMON_SOURCES := plat/layerscape/common/aarch64/ls_console.S diff --git a/plat/layerscape/common/ls_common.mk b/plat/layerscape/common/ls_common.mk index 5d96aed1ce877e6487e1d6b520d5a3155da20b36..39867e6dbb4f22cff8b1ffc4ef5d1ecd602a1dd6 100644 --- a/plat/layerscape/common/ls_common.mk +++ b/plat/layerscape/common/ls_common.mk @@ -15,8 +15,6 @@ SEPARATE_CODE_AND_RODATA := 1 COLD_BOOT_SINGLE_CPU := 1 -PLAT_INCLUDES += -Iinclude/common/tbbr - PLAT_BL_COMMON_SOURCES += plat/layerscape/common/${ARCH}/ls_helpers.S \ plat/layerscape/common/ls_common.c diff --git a/plat/layerscape/common/tsp/ls_tsp_setup.c b/plat/layerscape/common/tsp/ls_tsp_setup.c index c6073619a72177cfa58aba13cfbed13a693c5fa3..f3b60276c2d08b8a1f918b9866c81c4e4b1c44c4 100644 --- a/plat/layerscape/common/tsp/ls_tsp_setup.c +++ b/plat/layerscape/common/tsp/ls_tsp_setup.c @@ -4,6 +4,7 @@ * SPDX-License-Identifier: BSD-3-Clause */ +#include <common/bl_common.h> #include <common/debug.h> #include <common/interrupt_props.h> #include <drivers/arm/gicv2.h> @@ -12,8 +13,6 @@ #include "plat_ls.h" #include "soc.h" -#define BL32_END (unsigned long)(&__BL32_END__) - static const interrupt_prop_t g0_interrupt_props[] = { INTR_PROP_DESC(9, GIC_HIGHEST_SEC_PRIORITY, GICV2_INTR_GROUP0, GIC_INTR_CFG_LEVEL), diff --git a/plat/marvell/a3700/common/a3700_common.mk b/plat/marvell/a3700/common/a3700_common.mk index a4727d2ea74a7bae846f7a552ab14a2a3f002157..64cd43344e79c0858b56cc2718cb36505c5b362a 100644 --- a/plat/marvell/a3700/common/a3700_common.mk +++ b/plat/marvell/a3700/common/a3700_common.mk @@ -84,14 +84,11 @@ MARVELL_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \ plat/common/plat_gicv3.c \ drivers/arm/gic/v3/gic500.c -ATF_INCLUDES := -Iinclude/common/tbbr - PLAT_INCLUDES := -I$(PLAT_FAMILY_BASE)/$(PLAT) \ -I$(PLAT_COMMON_BASE)/include \ -I$(PLAT_INCLUDE_BASE)/common \ -I$(MARVELL_DRV_BASE) \ - -I$/drivers/arm/gic/common/ \ - $(ATF_INCLUDES) + -I$/drivers/arm/gic/common/ PLAT_BL_COMMON_SOURCES := $(PLAT_COMMON_BASE)/aarch64/a3700_common.c \ $(MARVELL_COMMON_BASE)/marvell_cci.c \ diff --git a/plat/marvell/a8k/common/a8k_common.mk b/plat/marvell/a8k/common/a8k_common.mk index efb05b8e24269168ebcf4f7886b412e4a11fc34a..ccb662bb2ce0cd415937cc9521f240773fca74f6 100644 --- a/plat/marvell/a8k/common/a8k_common.mk +++ b/plat/marvell/a8k/common/a8k_common.mk @@ -45,12 +45,9 @@ MARVELL_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \ drivers/arm/gic/v2/gicv2_helpers.c \ plat/common/plat_gicv2.c -ATF_INCLUDES := -Iinclude/common/tbbr - PLAT_INCLUDES := -I$(PLAT_FAMILY_BASE)/$(PLAT) \ -I$(PLAT_COMMON_BASE)/include \ - -I$(PLAT_INCLUDE_BASE)/common \ - $(ATF_INCLUDES) + -I$(PLAT_INCLUDE_BASE)/common PLAT_BL_COMMON_SOURCES := $(PLAT_COMMON_BASE)/aarch64/a8k_common.c \ drivers/ti/uart/aarch64/16550_console.S diff --git a/plat/marvell/a8k/common/ble/ble.mk b/plat/marvell/a8k/common/ble/ble.mk index ed4ff3af293606c0c282464bb3e46bfdb87afa64..b24083fc38267ba2c3873e93983d1b41af305754 100644 --- a/plat/marvell/a8k/common/ble/ble.mk +++ b/plat/marvell/a8k/common/ble/ble.mk @@ -17,11 +17,10 @@ BLE_SOURCES += $(BLE_PATH)/ble_main.c \ $(PLAT_MARVELL)/common/plat_delay_timer.c \ $(PLAT_MARVELL)/common/marvell_console.c -PLAT_INCLUDES += -I$(MV_DDR_PATH) \ - -I$(CURDIR)/include/ \ - -I$(CURDIR)/include/lib \ - -I$(CURDIR)/include/lib/libc \ - -I$(CURDIR)/include/lib/libc/aarch64 \ +PLAT_INCLUDES += -I$(MV_DDR_PATH) \ + -I$(CURDIR)/include \ + -I$(CURDIR)/include/lib/libc \ + -I$(CURDIR)/include/lib/libc/aarch64 \ -I$(CURDIR)/drivers/marvell BLE_LINKERFILE := $(BLE_PATH)/ble.ld.S diff --git a/plat/marvell/common/marvell_bl31_setup.c b/plat/marvell/common/marvell_bl31_setup.c index 802c01383bde07e524aeebe698570cf791e55a44..26ba90654201534e0040a963a64a9117034eca71 100644 --- a/plat/marvell/common/marvell_bl31_setup.c +++ b/plat/marvell/common/marvell_bl31_setup.c @@ -8,6 +8,7 @@ #include <assert.h> #include <arch.h> +#include <common/bl_common.h> #include <common/debug.h> #ifdef USE_CCI #include <drivers/arm/cci.h> @@ -19,15 +20,6 @@ #include <marvell_plat_priv.h> #include <plat_marvell.h> -/* - * The next 3 constants identify the extents of the code, RO data region and the - * limit of the BL31 image. These addresses are used by the MMU setup code and - * therefore they must be page-aligned. It is the responsibility of the linker - * script to ensure that __RO_START__, __RO_END__ & __BL31_END__ linker symbols - * refer to page-aligned addresses. - */ -#define BL31_END (unsigned long)(&__BL31_END__) - /* * Placeholder variables for copying the arguments that have been passed to * BL31 from BL2. diff --git a/plat/marvell/common/marvell_common.mk b/plat/marvell/common/marvell_common.mk index fb6fbb5859b8751fa7e4ad5f5868ea3ffaf438f3..a1282619582faafae4ce398da2c9d1d75746c8fc 100644 --- a/plat/marvell/common/marvell_common.mk +++ b/plat/marvell/common/marvell_common.mk @@ -22,8 +22,7 @@ $(eval $(call add_define,ARO_ENABLE)) LLC_ENABLE := 1 $(eval $(call add_define,LLC_ENABLE)) -PLAT_INCLUDES += -I. -Iinclude/common -Iinclude/common/tbbr \ - -I$(MARVELL_PLAT_INCLUDE_BASE)/common \ +PLAT_INCLUDES += -I$(MARVELL_PLAT_INCLUDE_BASE)/common \ -I$(MARVELL_PLAT_INCLUDE_BASE)/common/aarch64 diff --git a/plat/mediatek/mt6795/platform.mk b/plat/mediatek/mt6795/platform.mk index c2fd511e66ec11358f3e326b592e0c2c8351a14d..4ab692d409de22dc337b8a80d1d8b6c8c296bf22 100644 --- a/plat/mediatek/mt6795/platform.mk +++ b/plat/mediatek/mt6795/platform.mk @@ -23,7 +23,6 @@ PLAT_INCLUDES := -I${MTK_PLAT}/common/ \ -I${MTK_PLAT_SOC}/drivers/timer/ \ -I${MTK_PLAT_SOC}/include/ \ -Iinclude/plat/arm/common/ \ - -Iinclude/common/tbbr/ \ ${OEMS_INCLUDES} PLAT_BL_COMMON_SOURCES := lib/xlat_tables/aarch64/xlat_tables.c \ diff --git a/plat/qemu/platform.mk b/plat/qemu/platform.mk index 982886a9330283b04b62aa6682f5040c0f9afbc6..f086ddc6ca5e98eb73e3e51b86a7a9fb0e908f46 100644 --- a/plat/qemu/platform.mk +++ b/plat/qemu/platform.mk @@ -30,9 +30,7 @@ $(eval $(call add_define,QEMU_LOAD_BL32)) endif PLAT_PATH := plat/qemu/ -PLAT_INCLUDES := -Iinclude/plat/arm/common/ \ - -Iplat/qemu/include \ - -Iinclude/common/tbbr +PLAT_INCLUDES := -Iplat/qemu/include ifeq (${ARM_ARCH_MAJOR},8) PLAT_INCLUDES += -Iinclude/plat/arm/common/${ARCH} @@ -55,8 +53,6 @@ ifneq (${TRUSTED_BOARD_BOOT},0) drivers/auth/img_parser_mod.c \ drivers/auth/tbbr/tbbr_cot.c - PLAT_INCLUDES += -Iinclude/bl1/tbbr - BL1_SOURCES += ${AUTH_SOURCES} \ bl1/tbbr/tbbr_img_desc.c \ plat/common/tbbr/plat_tbbr.c \ diff --git a/plat/qemu/qemu_bl31_setup.c b/plat/qemu/qemu_bl31_setup.c index 97468114a1ae5eb075eb577028096c31386b4117..7453b89007c03d65733dab55b88ba258b7611320 100644 --- a/plat/qemu/qemu_bl31_setup.c +++ b/plat/qemu/qemu_bl31_setup.c @@ -15,15 +15,6 @@ #include "qemu_private.h" -/* - * The next 3 constants identify the extents of the code, RO data region and the - * limit of the BL3-1 image. These addresses are used by the MMU setup code and - * therefore they must be page-aligned. It is the responsibility of the linker - * script to ensure that __RO_START__, __RO_END__ & __BL31_END__ linker symbols - * refer to page-aligned addresses. - */ -#define BL31_END (unsigned long)(&__BL31_END__) - /* * Placeholder variables for copying the arguments that have been passed to * BL3-1 from BL2. diff --git a/plat/qemu/sp_min/sp_min_setup.c b/plat/qemu/sp_min/sp_min_setup.c index 88decdf4dd6170007546a965e0f70bd9a82500cc..88f7397c6aebd05b7816cc6c7716b564654e9f32 100644 --- a/plat/qemu/sp_min/sp_min_setup.c +++ b/plat/qemu/sp_min/sp_min_setup.c @@ -27,29 +27,6 @@ static entry_point_info_t bl33_image_ep_info; -/* - * The next 3 constants identify the extents of the code, RO data region and the - * limit of the BL3-1 image. These addresses are used by the MMU setup code and - * therefore they must be page-aligned. It is the responsibility of the linker - * script to ensure that __RO_START__, __RO_END__ & __BL31_END__ linker symbols - * refer to page-aligned addresses. - */ -#define BL32_RO_BASE (unsigned long)(&__RO_START__) -#define BL32_RO_LIMIT (unsigned long)(&__RO_END__) -#define BL32_END (unsigned long)(&__BL32_END__) - -#if USE_COHERENT_MEM -/* - * The next 2 constants identify the extents of the coherent memory region. - * These addresses are used by the MMU setup code and therefore they must be - * page-aligned. It is the responsibility of the linker script to ensure that - * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols - * refer to page-aligned addresses. - */ -#define BL32_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__) -#define BL32_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__) -#endif - /****************************************************************************** * On a GICv2 system, the Group 1 secure interrupts are treated as Group 0 * interrupts. @@ -146,7 +123,7 @@ void sp_min_early_platform_setup2(u_register_t arg0, u_register_t arg1, void sp_min_plat_arch_setup(void) { qemu_configure_mmu_svc_mon(BL32_RO_BASE, BL32_END - BL32_RO_BASE, - BL32_RO_BASE, BL32_RO_LIMIT, + BL_CODE_BASE, BL_CODE_END, BL_COHERENT_RAM_BASE, BL_COHERENT_RAM_END); } diff --git a/plat/renesas/rcar/platform.mk b/plat/renesas/rcar/platform.mk index 629a3cf98cdd32ba726e74c13e64cbd1c2a1f110..a54a60a37133425f436def4dc8c5ee021facddd0 100644 --- a/plat/renesas/rcar/platform.mk +++ b/plat/renesas/rcar/platform.mk @@ -306,8 +306,7 @@ include drivers/staging/renesas/rcar/qos/qos.mk include drivers/staging/renesas/rcar/pfc/pfc.mk include lib/libfdt/libfdt.mk -PLAT_INCLUDES := -Iinclude/common/tbbr \ - -Idrivers/staging/renesas/rcar/ddr \ +PLAT_INCLUDES := -Idrivers/staging/renesas/rcar/ddr \ -Idrivers/staging/renesas/rcar/qos \ -Idrivers/renesas/rcar/iic_dvfs \ -Idrivers/renesas/rcar/board \ diff --git a/plat/rockchip/rk3328/platform.mk b/plat/rockchip/rk3328/platform.mk index 2b2ac51c47e9a9478015c00bca5ca76841e0098d..ca6345b7ecb5814e7c981cfb21edf9d08630c754 100644 --- a/plat/rockchip/rk3328/platform.mk +++ b/plat/rockchip/rk3328/platform.mk @@ -10,7 +10,6 @@ RK_PLAT_COMMON := ${RK_PLAT}/common PLAT_INCLUDES := -Idrivers/arm/gic/common/ \ -Idrivers/arm/gic/v2/ \ - -Iinclude/plat/common/ \ -I${RK_PLAT_COMMON}/ \ -I${RK_PLAT_COMMON}/include/ \ -I${RK_PLAT_COMMON}/pmusram \ diff --git a/plat/rpi3/rpi3_bl31_setup.c b/plat/rpi3/rpi3_bl31_setup.c index d5c691e198e83e1be4b28ee280abb66f968de35b..2f1bc6493e81d77666a28ca61826c5a7c606c51a 100644 --- a/plat/rpi3/rpi3_bl31_setup.c +++ b/plat/rpi3/rpi3_bl31_setup.c @@ -17,8 +17,6 @@ #include "rpi3_private.h" -#define BL31_END (uintptr_t)(&__BL31_END__) - /* * Placeholder variables for copying the arguments that have been passed to * BL31 from BL2. diff --git a/plat/socionext/uniphier/platform.mk b/plat/socionext/uniphier/platform.mk index e7a1bfe5c936e90d9151fdc1a717fa65c949533e..94c44056eac8ae00ae770d0a7586d38ea1f49950 100644 --- a/plat/socionext/uniphier/platform.mk +++ b/plat/socionext/uniphier/platform.mk @@ -72,8 +72,6 @@ ifeq (${TRUSTED_BOARD_BOOT},1) include drivers/auth/mbedtls/mbedtls_crypto.mk include drivers/auth/mbedtls/mbedtls_x509.mk -PLAT_INCLUDES += -Iinclude/common/tbbr - BL2_SOURCES += drivers/auth/auth_mod.c \ drivers/auth/crypto_mod.c \ drivers/auth/img_parser_mod.c \ diff --git a/plat/socionext/uniphier/tsp/uniphier_tsp_setup.c b/plat/socionext/uniphier/tsp/uniphier_tsp_setup.c index e7dcc652db4db8b19066c98de9098848239164a2..0b232e0674f10d50a0b1e3b96e5c3c2fb952c470 100644 --- a/plat/socionext/uniphier/tsp/uniphier_tsp_setup.c +++ b/plat/socionext/uniphier/tsp/uniphier_tsp_setup.c @@ -6,11 +6,11 @@ #include <platform_def.h> +#include <common/bl_common.h> #include <lib/xlat_tables/xlat_mmu_helpers.h> #include "../uniphier.h" -#define BL32_END (unsigned long)(&__BL32_END__) #define BL32_SIZE ((BL32_END) - (BL32_BASE)) void tsp_early_platform_setup(void) diff --git a/plat/socionext/uniphier/uniphier_bl2_setup.c b/plat/socionext/uniphier/uniphier_bl2_setup.c index 7109d21fefbeb5128330474b094decb6cb00c2ff..787b3ac3d11e5fa1ef835c1ec9f8a5220636cd0b 100644 --- a/plat/socionext/uniphier/uniphier_bl2_setup.c +++ b/plat/socionext/uniphier/uniphier_bl2_setup.c @@ -21,7 +21,6 @@ #include "uniphier.h" -#define BL2_END (unsigned long)(&__BL2_END__) #define BL2_SIZE ((BL2_END) - (BL2_BASE)) static int uniphier_bl2_kick_scp; diff --git a/plat/xilinx/zynqmp/bl31_zynqmp_setup.c b/plat/xilinx/zynqmp/bl31_zynqmp_setup.c index b0eb66ca40aa59ae23bc0ae2834e62d3c668843c..0d0b991aeebfeff2b4c09296824d0e9e8877d902 100644 --- a/plat/xilinx/zynqmp/bl31_zynqmp_setup.c +++ b/plat/xilinx/zynqmp/bl31_zynqmp_setup.c @@ -16,8 +16,6 @@ #include <plat_private.h> -#define BL31_END (unsigned long)(&__BL31_END__) - static entry_point_info_t bl32_image_ep_info; static entry_point_info_t bl33_image_ep_info; diff --git a/plat/xilinx/zynqmp/tsp/tsp_plat_setup.c b/plat/xilinx/zynqmp/tsp/tsp_plat_setup.c index 902e4b3b6d09cccb05d844b152cde84a776ef01f..e3d4164d492ad3325d59b518b12227e56ab2d2c7 100644 --- a/plat/xilinx/zynqmp/tsp/tsp_plat_setup.c +++ b/plat/xilinx/zynqmp/tsp/tsp_plat_setup.c @@ -12,9 +12,6 @@ #include <plat_private.h> #include <platform_tsp.h> - -#define BL32_END (unsigned long)(&__BL32_END__) - /******************************************************************************* * Initialize the UART ******************************************************************************/