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adam.huang
Arm Trusted Firmware
Commits
a45ccf13
Unverified
Commit
a45ccf13
authored
Feb 05, 2019
by
Antonio Niño Díaz
Committed by
GitHub
Feb 05, 2019
Browse files
Merge pull request #1804 from antonio-nino-diaz-arm/an/cleanup
Minor cleanup
parents
49dd0481
5e447816
Changes
36
Show whitespace changes
Inline
Side-by-side
plat/marvell/a8k/common/a8k_common.mk
View file @
a45ccf13
...
...
@@ -45,12 +45,9 @@ MARVELL_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \
drivers/arm/gic/v2/gicv2_helpers.c
\
plat/common/plat_gicv2.c
ATF_INCLUDES
:=
-Iinclude
/common/tbbr
PLAT_INCLUDES
:=
-I
$(PLAT_FAMILY_BASE)
/
$(PLAT)
\
-I
$(PLAT_COMMON_BASE)
/include
\
-I
$(PLAT_INCLUDE_BASE)
/common
\
$(ATF_INCLUDES)
-I
$(PLAT_INCLUDE_BASE)
/common
PLAT_BL_COMMON_SOURCES
:=
$(PLAT_COMMON_BASE)
/aarch64/a8k_common.c
\
drivers/ti/uart/aarch64/16550_console.S
...
...
plat/marvell/a8k/common/ble/ble.mk
View file @
a45ccf13
...
...
@@ -18,8 +18,7 @@ BLE_SOURCES += $(BLE_PATH)/ble_main.c \
$(PLAT_MARVELL)
/common/marvell_console.c
PLAT_INCLUDES
+=
-I
$(MV_DDR_PATH)
\
-I
$(CURDIR)
/include/
\
-I
$(CURDIR)
/include/lib
\
-I
$(CURDIR)
/include
\
-I
$(CURDIR)
/include/lib/libc
\
-I
$(CURDIR)
/include/lib/libc/aarch64
\
-I
$(CURDIR)
/drivers/marvell
...
...
plat/marvell/common/marvell_bl31_setup.c
View file @
a45ccf13
...
...
@@ -8,6 +8,7 @@
#include <assert.h>
#include <arch.h>
#include <common/bl_common.h>
#include <common/debug.h>
#ifdef USE_CCI
#include <drivers/arm/cci.h>
...
...
@@ -19,15 +20,6 @@
#include <marvell_plat_priv.h>
#include <plat_marvell.h>
/*
* The next 3 constants identify the extents of the code, RO data region and the
* limit of the BL31 image. These addresses are used by the MMU setup code and
* therefore they must be page-aligned. It is the responsibility of the linker
* script to ensure that __RO_START__, __RO_END__ & __BL31_END__ linker symbols
* refer to page-aligned addresses.
*/
#define BL31_END (unsigned long)(&__BL31_END__)
/*
* Placeholder variables for copying the arguments that have been passed to
* BL31 from BL2.
...
...
plat/marvell/common/marvell_common.mk
View file @
a45ccf13
...
...
@@ -22,8 +22,7 @@ $(eval $(call add_define,ARO_ENABLE))
LLC_ENABLE
:=
1
$(eval
$(call
add_define,LLC_ENABLE))
PLAT_INCLUDES
+=
-I
.
-Iinclude
/common
-Iinclude
/common/tbbr
\
-I
$(MARVELL_PLAT_INCLUDE_BASE)
/common
\
PLAT_INCLUDES
+=
-I
$(MARVELL_PLAT_INCLUDE_BASE)
/common
\
-I
$(MARVELL_PLAT_INCLUDE_BASE)
/common/aarch64
...
...
plat/mediatek/mt6795/platform.mk
View file @
a45ccf13
...
...
@@ -23,7 +23,6 @@ PLAT_INCLUDES := -I${MTK_PLAT}/common/ \
-I
${MTK_PLAT_SOC}
/drivers/timer/
\
-I
${MTK_PLAT_SOC}
/include/
\
-Iinclude
/plat/arm/common/
\
-Iinclude
/common/tbbr/
\
${OEMS_INCLUDES}
PLAT_BL_COMMON_SOURCES
:=
lib/xlat_tables/aarch64/xlat_tables.c
\
...
...
plat/qemu/platform.mk
View file @
a45ccf13
...
...
@@ -30,9 +30,7 @@ $(eval $(call add_define,QEMU_LOAD_BL32))
endif
PLAT_PATH
:=
plat/qemu/
PLAT_INCLUDES
:=
-Iinclude
/plat/arm/common/
\
-Iplat
/qemu/include
\
-Iinclude
/common/tbbr
PLAT_INCLUDES
:=
-Iplat
/qemu/include
ifeq
(${ARM_ARCH_MAJOR},8)
PLAT_INCLUDES
+=
-Iinclude
/plat/arm/common/
${ARCH}
...
...
@@ -55,8 +53,6 @@ ifneq (${TRUSTED_BOARD_BOOT},0)
drivers/auth/img_parser_mod.c
\
drivers/auth/tbbr/tbbr_cot.c
PLAT_INCLUDES
+=
-Iinclude
/bl1/tbbr
BL1_SOURCES
+=
${AUTH_SOURCES}
\
bl1/tbbr/tbbr_img_desc.c
\
plat/common/tbbr/plat_tbbr.c
\
...
...
plat/qemu/qemu_bl31_setup.c
View file @
a45ccf13
...
...
@@ -15,15 +15,6 @@
#include "qemu_private.h"
/*
* The next 3 constants identify the extents of the code, RO data region and the
* limit of the BL3-1 image. These addresses are used by the MMU setup code and
* therefore they must be page-aligned. It is the responsibility of the linker
* script to ensure that __RO_START__, __RO_END__ & __BL31_END__ linker symbols
* refer to page-aligned addresses.
*/
#define BL31_END (unsigned long)(&__BL31_END__)
/*
* Placeholder variables for copying the arguments that have been passed to
* BL3-1 from BL2.
...
...
plat/qemu/sp_min/sp_min_setup.c
View file @
a45ccf13
...
...
@@ -27,29 +27,6 @@
static
entry_point_info_t
bl33_image_ep_info
;
/*
* The next 3 constants identify the extents of the code, RO data region and the
* limit of the BL3-1 image. These addresses are used by the MMU setup code and
* therefore they must be page-aligned. It is the responsibility of the linker
* script to ensure that __RO_START__, __RO_END__ & __BL31_END__ linker symbols
* refer to page-aligned addresses.
*/
#define BL32_RO_BASE (unsigned long)(&__RO_START__)
#define BL32_RO_LIMIT (unsigned long)(&__RO_END__)
#define BL32_END (unsigned long)(&__BL32_END__)
#if USE_COHERENT_MEM
/*
* The next 2 constants identify the extents of the coherent memory region.
* These addresses are used by the MMU setup code and therefore they must be
* page-aligned. It is the responsibility of the linker script to ensure that
* __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols
* refer to page-aligned addresses.
*/
#define BL32_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__)
#define BL32_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__)
#endif
/******************************************************************************
* On a GICv2 system, the Group 1 secure interrupts are treated as Group 0
* interrupts.
...
...
@@ -146,7 +123,7 @@ void sp_min_early_platform_setup2(u_register_t arg0, u_register_t arg1,
void
sp_min_plat_arch_setup
(
void
)
{
qemu_configure_mmu_svc_mon
(
BL32_RO_BASE
,
BL32_END
-
BL32_RO_BASE
,
BL
32_RO
_BASE
,
BL
32_RO_LIMIT
,
BL
_CODE
_BASE
,
BL
_CODE_END
,
BL_COHERENT_RAM_BASE
,
BL_COHERENT_RAM_END
);
}
...
...
plat/renesas/rcar/platform.mk
View file @
a45ccf13
...
...
@@ -306,8 +306,7 @@ include drivers/staging/renesas/rcar/qos/qos.mk
include
drivers/staging/renesas/rcar/pfc/pfc.mk
include
lib/libfdt/libfdt.mk
PLAT_INCLUDES
:=
-Iinclude
/common/tbbr
\
-Idrivers
/staging/renesas/rcar/ddr
\
PLAT_INCLUDES
:=
-Idrivers
/staging/renesas/rcar/ddr
\
-Idrivers
/staging/renesas/rcar/qos
\
-Idrivers
/renesas/rcar/iic_dvfs
\
-Idrivers
/renesas/rcar/board
\
...
...
plat/rockchip/rk3328/platform.mk
View file @
a45ccf13
...
...
@@ -10,7 +10,6 @@ RK_PLAT_COMMON := ${RK_PLAT}/common
PLAT_INCLUDES
:=
-Idrivers
/arm/gic/common/
\
-Idrivers
/arm/gic/v2/
\
-Iinclude
/plat/common/
\
-I
${RK_PLAT_COMMON}
/
\
-I
${RK_PLAT_COMMON}
/include/
\
-I
${RK_PLAT_COMMON}
/pmusram
\
...
...
plat/rpi3/rpi3_bl31_setup.c
View file @
a45ccf13
...
...
@@ -17,8 +17,6 @@
#include "rpi3_private.h"
#define BL31_END (uintptr_t)(&__BL31_END__)
/*
* Placeholder variables for copying the arguments that have been passed to
* BL31 from BL2.
...
...
plat/socionext/uniphier/platform.mk
View file @
a45ccf13
...
...
@@ -72,8 +72,6 @@ ifeq (${TRUSTED_BOARD_BOOT},1)
include
drivers/auth/mbedtls/mbedtls_crypto.mk
include
drivers/auth/mbedtls/mbedtls_x509.mk
PLAT_INCLUDES
+=
-Iinclude
/common/tbbr
BL2_SOURCES
+=
drivers/auth/auth_mod.c
\
drivers/auth/crypto_mod.c
\
drivers/auth/img_parser_mod.c
\
...
...
plat/socionext/uniphier/tsp/uniphier_tsp_setup.c
View file @
a45ccf13
...
...
@@ -6,11 +6,11 @@
#include <platform_def.h>
#include <common/bl_common.h>
#include <lib/xlat_tables/xlat_mmu_helpers.h>
#include "../uniphier.h"
#define BL32_END (unsigned long)(&__BL32_END__)
#define BL32_SIZE ((BL32_END) - (BL32_BASE))
void
tsp_early_platform_setup
(
void
)
...
...
plat/socionext/uniphier/uniphier_bl2_setup.c
View file @
a45ccf13
...
...
@@ -21,7 +21,6 @@
#include "uniphier.h"
#define BL2_END (unsigned long)(&__BL2_END__)
#define BL2_SIZE ((BL2_END) - (BL2_BASE))
static
int
uniphier_bl2_kick_scp
;
...
...
plat/xilinx/zynqmp/bl31_zynqmp_setup.c
View file @
a45ccf13
...
...
@@ -16,8 +16,6 @@
#include <plat_private.h>
#define BL31_END (unsigned long)(&__BL31_END__)
static
entry_point_info_t
bl32_image_ep_info
;
static
entry_point_info_t
bl33_image_ep_info
;
...
...
plat/xilinx/zynqmp/tsp/tsp_plat_setup.c
View file @
a45ccf13
...
...
@@ -12,9 +12,6 @@
#include <plat_private.h>
#include <platform_tsp.h>
#define BL32_END (unsigned long)(&__BL32_END__)
/*******************************************************************************
* Initialize the UART
******************************************************************************/
...
...
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