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Unverified Commit a51443fa authored by Soby Mathew's avatar Soby Mathew Committed by GitHub
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Merge pull request #1582 from ldts/rcar_gen3/upstream 

rcar_gen3: initial support
parents 0059be2d 84433c50
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plat/renesas/rcar/plat_topology.c 0 → 100644
View file @ a51443fa
/*
* Copyright (c) 2018, Renesas Electronics Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <debug.h>
#include <platform_def.h>
#include <psci.h>
static const unsigned char rcar_power_domain_tree_desc[] = {
1,
PLATFORM_CLUSTER_COUNT,
PLATFORM_CLUSTER0_CORE_COUNT,
PLATFORM_CLUSTER1_CORE_COUNT
};
const unsigned char *plat_get_power_domain_tree_desc(void)
{
return rcar_power_domain_tree_desc;
}
int plat_core_pos_by_mpidr(u_register_t mpidr)
{
unsigned int cluster_id, cpu_id;
mpidr &= MPIDR_AFFINITY_MASK;
if (mpidr & ~(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK))
return -1;
cluster_id = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK;
cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK;
if (cluster_id >= PLATFORM_CLUSTER_COUNT)
return -1;
if (cluster_id == 0 && cpu_id >= PLATFORM_CLUSTER0_CORE_COUNT)
return -1;
if (cluster_id == 1 && cpu_id >= PLATFORM_CLUSTER1_CORE_COUNT)
return -1;
return (cpu_id + cluster_id * PLATFORM_CLUSTER0_CORE_COUNT);
}
plat/renesas/rcar/platform.mk 0 → 100644
View file @ a51443fa
#
# Copyright (c) 2018, Renesas Electronics Corporation. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
PROGRAMMABLE_RESET_ADDRESS := 0
COLD_BOOT_SINGLE_CPU := 1
ARM_CCI_PRODUCT_ID := 500
TRUSTED_BOARD_BOOT := 1
RESET_TO_BL31 := 1
GENERATE_COT := 1
BL2_AT_EL3 := 1
$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT))
ifeq (${SPD},none)
SPD_NONE:=1
$(eval $(call add_define,SPD_NONE))
endif
# LSI setting common define
RCAR_H3:=0
RCAR_M3:=1
RCAR_M3N:=2
RCAR_E3:=3
RCAR_H3N:=4
RCAR_AUTO:=99
$(eval $(call add_define,RCAR_H3))
$(eval $(call add_define,RCAR_M3))
$(eval $(call add_define,RCAR_M3N))
$(eval $(call add_define,RCAR_E3))
$(eval $(call add_define,RCAR_H3N))
$(eval $(call add_define,RCAR_AUTO))
RCAR_CUT_10:=0
RCAR_CUT_11:=1
RCAR_CUT_20:=10
RCAR_CUT_30:=20
$(eval $(call add_define,RCAR_CUT_10))
$(eval $(call add_define,RCAR_CUT_11))
$(eval $(call add_define,RCAR_CUT_20))
$(eval $(call add_define,RCAR_CUT_30))
ifndef LSI
$(error "Error: Unknown LSI. Please use LSI=<LSI name> to specify the LSI")
else
ifeq (${LSI},AUTO)
RCAR_LSI:=${RCAR_AUTO}
else ifeq (${LSI},H3)
RCAR_LSI:=${RCAR_H3}
ifndef LSI_CUT
# enable compatible function.
RCAR_LSI_CUT_COMPAT := 1
$(eval $(call add_define,RCAR_LSI_CUT_COMPAT))
else
# disable compatible function.
ifeq (${LSI_CUT},10)
RCAR_LSI_CUT:=0
else ifeq (${LSI_CUT},11)
RCAR_LSI_CUT:=1
else ifeq (${LSI_CUT},20)
RCAR_LSI_CUT:=10
else ifeq (${LSI_CUT},30)
RCAR_LSI_CUT:=20
else
$(error "Error: ${LSI_CUT} is not supported.")
endif
$(eval $(call add_define,RCAR_LSI_CUT))
endif
else ifeq (${LSI},H3N)
RCAR_LSI:=${RCAR_H3N}
ifndef LSI_CUT
# enable compatible function.
RCAR_LSI_CUT_COMPAT := 1
$(eval $(call add_define,RCAR_LSI_CUT_COMPAT))
else
# disable compatible function.
ifeq (${LSI_CUT},30)
RCAR_LSI_CUT:=20
else
$(error "Error: ${LSI_CUT} is not supported.")
endif
$(eval $(call add_define,RCAR_LSI_CUT))
endif
else ifeq (${LSI},M3)
RCAR_LSI:=${RCAR_M3}
ifndef LSI_CUT
# enable compatible function.
RCAR_LSI_CUT_COMPAT := 1
$(eval $(call add_define,RCAR_LSI_CUT_COMPAT))
else
# disable compatible function.
ifeq (${LSI_CUT},10)
RCAR_LSI_CUT:=0
else ifeq (${LSI_CUT},11)
RCAR_LSI_CUT:=1
else
$(error "Error: ${LSI_CUT} is not supported.")
endif
$(eval $(call add_define,RCAR_LSI_CUT))
endif
else ifeq (${LSI},M3N)
RCAR_LSI:=${RCAR_M3N}
ifndef LSI_CUT
# enable compatible function.
RCAR_LSI_CUT_COMPAT := 1
$(eval $(call add_define,RCAR_LSI_CUT_COMPAT))
else
# disable compatible function.
ifeq (${LSI_CUT},10)
RCAR_LSI_CUT:=0
else ifeq (${LSI_CUT},11)
RCAR_LSI_CUT:=1
else
$(error "Error: ${LSI_CUT} is not supported.")
endif
$(eval $(call add_define,RCAR_LSI_CUT))
endif
else ifeq (${LSI},E3)
RCAR_LSI:=${RCAR_E3}
ifndef LSI_CUT
# enable compatible function.
RCAR_LSI_CUT_COMPAT := 1
$(eval $(call add_define,RCAR_LSI_CUT_COMPAT))
else
# disable compatible function.
ifeq (${LSI_CUT},10)
RCAR_LSI_CUT:=0
else
$(error "Error: ${LSI_CUT} is not supported.")
endif
$(eval $(call add_define,RCAR_LSI_CUT))
endif
else
$(error "Error: ${LSI} is not supported.")
endif
$(eval $(call add_define,RCAR_LSI))
endif
# Process RCAR_SECURE_BOOT flag
ifndef RCAR_SECURE_BOOT
RCAR_SECURE_BOOT := 1
endif
$(eval $(call add_define,RCAR_SECURE_BOOT))
# Process RCAR_QOS_TYPE flag
ifndef RCAR_QOS_TYPE
RCAR_QOS_TYPE := 0
endif
$(eval $(call add_define,RCAR_QOS_TYPE))
# Process RCAR_DRAM_SPLIT flag
ifndef RCAR_DRAM_SPLIT
RCAR_DRAM_SPLIT := 0
endif
$(eval $(call add_define,RCAR_DRAM_SPLIT))
# Process RCAR_BL33_EXECUTION_EL flag
ifndef RCAR_BL33_EXECUTION_EL
RCAR_BL33_EXECUTION_EL := 0
endif
$(eval $(call add_define,RCAR_BL33_EXECUTION_EL))
# Process RCAR_AVS_SETTING_ENABLE flag
ifeq (${RCAR_AVS_SETTING_ENABLE},0)
AVS_SETTING_ENABLE := 0
else
AVS_SETTING_ENABLE := 1
endif
$(eval $(call add_define,AVS_SETTING_ENABLE))
# Process RCAR_LOSSY_ENABLE flag
ifndef RCAR_LOSSY_ENABLE
RCAR_LOSSY_ENABLE := 0
endif
$(eval $(call add_define,RCAR_LOSSY_ENABLE))
# Process LIFEC_DBSC_PROTECT_ENABLE flag
ifndef LIFEC_DBSC_PROTECT_ENABLE
LIFEC_DBSC_PROTECT_ENABLE := 1
endif
$(eval $(call add_define,LIFEC_DBSC_PROTECT_ENABLE))
# Process PMIC_ROHM_BD9571 flag
ifndef PMIC_ROHM_BD9571
PMIC_ROHM_BD9571 := 1
endif
$(eval $(call add_define,PMIC_ROHM_BD9571))
# Process PMIC_LEVEL_MODE flag
ifndef PMIC_LEVEL_MODE
PMIC_LEVEL_MODE := 1
endif
$(eval $(call add_define,PMIC_LEVEL_MODE))
# Process RCAR_GEN3_ULCB flag
ifndef RCAR_GEN3_ULCB
RCAR_GEN3_ULCB := 0
endif
ifeq (${RCAR_GEN3_ULCB},1)
BOARD_DEFAULT := 0x10
$(eval $(call add_define,BOARD_DEFAULT))
endif
$(eval $(call add_define,RCAR_GEN3_ULCB))
# Process RCAR_REF_INT flag
ifndef RCAR_REF_INT
RCAR_REF_INT :=0
endif
$(eval $(call add_define,RCAR_REF_INT))
# Process RCAR_REWT_TRAINING flag
ifndef RCAR_REWT_TRAINING
RCAR_REWT_TRAINING := 0
endif
$(eval $(call add_define,RCAR_REWT_TRAINING))
# Process RCAR_SYSTEM_SUSPEND flag
ifndef RCAR_SYSTEM_SUSPEND
RCAR_SYSTEM_SUSPEND := 1
endif
$(eval $(call add_define,RCAR_SYSTEM_SUSPEND))
# SYSTEM_SUSPEND requires power control of PMIC etc.
# When executing SYSTEM_SUSPEND other than Salvator-X, Salvator-XS and Ebisu,
# processing equivalent to that implemented in PMIC_ROHM_BD9571 is necessary.
ifeq (${RCAR_SYSTEM_SUSPEND},1)
ifeq (${PMIC_ROHM_BD9571},0)
$(error "Error: When you want RCAR_SYSTEM_SUSPEND to be enable, please also set PMIC_ROHM_BD9571 to enable.")
endif
endif
# Process RCAR_DRAM_LPDDR4_MEMCONF flag
ifndef RCAR_DRAM_LPDDR4_MEMCONF
RCAR_DRAM_LPDDR4_MEMCONF :=1
endif
$(eval $(call add_define,RCAR_DRAM_LPDDR4_MEMCONF))
# Process RCAR_DRAM_DDR3L_MEMCONF flag
ifndef RCAR_DRAM_DDR3L_MEMCONF
RCAR_DRAM_DDR3L_MEMCONF :=1
endif
$(eval $(call add_define,RCAR_DRAM_DDR3L_MEMCONF))
# Process RCAR_DRAM_DDR3L_MEMDUAL flag
ifndef RCAR_DRAM_DDR3L_MEMDUAL
RCAR_DRAM_DDR3L_MEMDUAL :=1
endif
$(eval $(call add_define,RCAR_DRAM_DDR3L_MEMDUAL))
# Process RCAR_BL33_ARG0 flag
ifdef RCAR_BL33_ARG0
$(eval $(call add_define,RCAR_BL33_ARG0))
endif
#Process RCAR_BL2_DCACHE flag
ifndef RCAR_BL2_DCACHE
RCAR_BL2_DCACHE := 0
endif
$(eval $(call add_define,RCAR_BL2_DCACHE))
# Process RCAR_DRAM_CHANNEL flag
ifndef RCAR_DRAM_CHANNEL
RCAR_DRAM_CHANNEL :=15
endif
$(eval $(call add_define,RCAR_DRAM_CHANNEL))
#Process RCAR_SYSTEM_RESET_KEEPON_DDR flag
ifndef RCAR_SYSTEM_RESET_KEEPON_DDR
RCAR_SYSTEM_RESET_KEEPON_DDR := 0
endif
$(eval $(call add_define,RCAR_SYSTEM_RESET_KEEPON_DDR))
# RCAR_SYSTEM_RESET_KEEPON_DDR requires power control of PMIC etc.
# When executing SYSTEM_SUSPEND other than Salvator-X, Salvator-XS and Ebisu,
# processing equivalent to that implemented in PMIC_ROHM_BD9571 is necessary.
# Also, it is necessary to enable RCAR_SYSTEM_SUSPEND.
ifeq (${RCAR_SYSTEM_RESET_KEEPON_DDR},1)
ifeq (${PMIC_ROHM_BD9571},0)
$(error "Error: When you want RCAR_SYSTEM_RESET_KEEPON_DDR to be enable, please also set PMIC_ROHM_BD9571 to enable.")
endif
ifeq (${RCAR_SYSTEM_SUSPEND},0)
$(error "Error: When you want RCAR_SYSTEM_RESET_KEEPON_DDR to be enable, please also set RCAR_SYSTEM_SUSPEND to enable.")
endif
endif
# Enable workarounds for selected Cortex-A53 erratas.
ERRATA_A53_835769 := 1
ERRATA_A53_843419 := 1
ERRATA_A53_855873 := 1
# Enable workarounds for selected Cortex-A57 erratas.
ERRATA_A57_859972 := 1
ERRATA_A57_813419 := 1
include drivers/staging/renesas/rcar/ddr/ddr.mk
include drivers/staging/renesas/rcar/qos/qos.mk
include drivers/staging/renesas/rcar/pfc/pfc.mk
PLAT_INCLUDES := -Iinclude/common/tbbr \
-Idrivers/staging/renesas/rcar/ddr \
-Idrivers/staging/renesas/rcar/qos \
-Idrivers/renesas/rcar/iic_dvfs \
-Idrivers/renesas/rcar/board \
-Idrivers/renesas/rcar/avs \
-Idrivers/renesas/rcar/delay \
-Idrivers/renesas/rcar/rom \
-Idrivers/renesas/rcar/scif \
-Idrivers/renesas/rcar/emmc \
-Idrivers/renesas/rcar/pwrc \
-Idrivers/renesas/rcar/io \
-Iplat/renesas/rcar/include/registers \
-Iplat/renesas/rcar/include \
-Iplat/renesas/rcar
PLAT_BL_COMMON_SOURCES := drivers/renesas/rcar/iic_dvfs/iic_dvfs.c
RCAR_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \
drivers/arm/gic/v2/gicv2_main.c \
drivers/arm/gic/v2/gicv2_helpers.c \
plat/common/plat_gicv2.c
BL2_SOURCES += ${RCAR_GIC_SOURCES} \
lib/cpus/aarch64/cortex_a53.S \
lib/cpus/aarch64/cortex_a57.S \
common/desc_image_load.c \
plat/renesas/rcar/aarch64/platform_common.c \
plat/renesas/rcar/aarch64/plat_helpers.S \
plat/renesas/rcar/bl2_interrupt_error.c \
plat/renesas/rcar/bl2_secure_setting.c \
plat/renesas/rcar/bl2_plat_setup.c \
plat/renesas/rcar/plat_storage.c \
plat/renesas/rcar/bl2_plat_mem_params_desc.c \
plat/renesas/rcar/plat_image_load.c \
plat/renesas/rcar/bl2_cpg_init.c \
drivers/renesas/rcar/console/rcar_printf.c \
drivers/renesas/rcar/scif/scif.S \
drivers/renesas/rcar/common.c \
drivers/renesas/rcar/io/io_emmcdrv.c \
drivers/renesas/rcar/io/io_memdrv.c \
drivers/renesas/rcar/io/io_rcar.c \
drivers/renesas/rcar/auth/auth_mod.c \
drivers/renesas/rcar/rpc/rpc_driver.c \
drivers/renesas/rcar/dma/dma_driver.c \
drivers/renesas/rcar/avs/avs_driver.c \
drivers/renesas/rcar/delay/micro_delay.S \
drivers/renesas/rcar/emmc/emmc_interrupt.c \
drivers/renesas/rcar/emmc/emmc_utility.c \
drivers/renesas/rcar/emmc/emmc_mount.c \
drivers/renesas/rcar/emmc/emmc_init.c \
drivers/renesas/rcar/emmc/emmc_read.c \
drivers/renesas/rcar/emmc/emmc_cmd.c \
drivers/renesas/rcar/watchdog/swdt.c \
drivers/renesas/rcar/rom/rom_api.c \
drivers/renesas/rcar/board/board.c \
drivers/io/io_storage.c
BL31_SOURCES += ${RCAR_GIC_SOURCES} \
lib/cpus/aarch64/cortex_a53.S \
lib/cpus/aarch64/cortex_a57.S \
plat/common/plat_psci_common.c \
plat/renesas/rcar/plat_topology.c \
plat/renesas/rcar/aarch64/plat_helpers.S \
plat/renesas/rcar/aarch64/platform_common.c \
plat/renesas/rcar/bl31_plat_setup.c \
plat/renesas/rcar/plat_pm.c \
drivers/renesas/rcar/console/rcar_console.S \
drivers/renesas/rcar/console/rcar_printf.c \
drivers/renesas/rcar/pwrc/call_sram.S \
drivers/renesas/rcar/pwrc/pwrc.c \
drivers/renesas/rcar/common.c \
drivers/arm/cci/cci.c
ifeq (${RCAR_GEN3_ULCB},1)
BL31_SOURCES += drivers/renesas/rcar/cpld/ulcb_cpld.c
endif
include lib/xlat_tables_v2/xlat_tables.mk
include drivers/auth/mbedtls/mbedtls_crypto.mk
PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS}
# build the layout images for the bootrom and the necessary srecords
rcar: rcar_layout_tool rcar_srecord
distclean realclean clean: clean_layout_tool clean_srecord
# layout images
LAYOUT_TOOLPATH ?= tools/renesas/rcar_layout_create
clean_layout_tool:
@echo "clean layout tool"
${Q}${MAKE} -C ${LAYOUT_TOOLPATH} clean
.PHONY: rcar_layout_tool
rcar_layout_tool:
@echo "generating layout srecs"
${Q}${MAKE} CPPFLAGS="-D=AARCH64" --no-print-directory -C ${LAYOUT_TOOLPATH}
# srecords
SREC_PATH = ${BUILD_PLAT}
BL2_ELF_SRC = ${SREC_PATH}/bl2/bl2.elf
BL31_ELF_SRC = ${SREC_PATH}/bl31/bl31.elf
clean_srecord:
@echo "clean bl2 and bl31 srecs"
rm -f ${SREC_PATH}/bl2.srec ${SREC_PATH}/bl31.srec
.PHONY: rcar_srecord
rcar_srecord:
@echo "generating srec: ${SREC_PATH}/bl2.srec"
$(Q)$(OC) -O srec --srec-forceS3 ${BL2_ELF_SRC} ${SREC_PATH}/bl2.srec
@echo "generating srec: ${SREC_PATH}/bl31.srec"
$(Q)$(OC) -O srec --srec-forceS3 ${BL31_ELF_SRC} ${SREC_PATH}/bl31.srec
tools/renesas/rcar_layout_create/makefile 0 → 100644
View file @ a51443fa
#
# Copyright (c) 2015-2018, Renesas Electronics Corporation. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
###################################################
# makefile
###################################################
#output file name
FILE_NAME_SA0 = bootparam_sa0
FILE_NAME_SA6 = cert_header_sa6
OUTPUT_FILE_SA0 = $(FILE_NAME_SA0).elf
OUTPUT_FILE_SA6 = $(FILE_NAME_SA6).elf
#object file name
OBJ_FILE_SA0 = sa0.o
OBJ_FILE_SA6 = sa6.o
#linker script name
MEMORY_DEF_SA0 = sa0.ld.S
MEMORY_DEF_SA6 = sa6.ld.S
###################################################
# Convenience function for adding build definitions
# $(eval $(call add_define,FOO)) will have:
# -DFOO if $(FOO) is empty; -DFOO=$(FOO) otherwise
define add_define
DEFINES += -D$(1)$(if $(value $(1)),=$(value $(1)),)
endef
# Process RCAR_SA0_SIZE flag
ifndef RCAR_SA0_SIZE
RCAR_SA0_SIZE := 1
else
ifeq (${RCAR_SA0_SIZE},0)
RCAR_SA0_SIZE := 0
else
RCAR_SA0_SIZE := 1
endif
endif
$(eval $(call add_define,RCAR_SA0_SIZE))
# Process RCAR_SA6_TYPE flag
ifndef RCAR_SA6_TYPE
RCAR_SA6_TYPE := 0
else
ifeq (${RCAR_SA6_TYPE},0)
RCAR_SA6_TYPE := 0
else
RCAR_SA6_TYPE := 1
endif
endif
$(eval $(call add_define,RCAR_SA6_TYPE))
###################################################
#c compiler
CC = $(CROSS_COMPILE)gcc
CFLAGS += ${DEFINES}
CFLAGS += -I../../include/lib/stdlib
#Linker
LD = $(CROSS_COMPILE)ld
#objcopy
objcopy = $(CROSS_COMPILE)objcopy
#clean
CL = rm -f
###################################################
.SUFFIXES : .s .c .o
###################################################
# command
.PHONY: all
all: $(OUTPUT_FILE_SA0) $(OUTPUT_FILE_SA6)
###################################################
# Linker
###################################################
$(OUTPUT_FILE_SA0) : $(MEMORY_DEF_SA0) $(OBJ_FILE_SA0)
$(LD) $(OBJ_FILE_SA0) \
-T $(MEMORY_DEF_SA0) \
-o $(OUTPUT_FILE_SA0) \
-Map $(FILE_NAME_SA0).map \
$(objcopy) -O srec --adjust-vma=0xE6320000 --srec-forceS3 $(OUTPUT_FILE_SA0) $(FILE_NAME_SA0).srec
$(objcopy) -O binary --adjust-vma=0xE6320000 --srec-forceS3 $(OUTPUT_FILE_SA0) $(FILE_NAME_SA0).bin
$(OUTPUT_FILE_SA6) : $(MEMORY_DEF_SA6) $(OBJ_FILE_SA6)
$(LD) $(OBJ_FILE_SA6) \
-T $(MEMORY_DEF_SA6) \
-o $(OUTPUT_FILE_SA6) \
-Map $(FILE_NAME_SA6).map \
$(objcopy) -O srec --adjust-vma=0xE6320000 --srec-forceS3 $(OUTPUT_FILE_SA6) $(FILE_NAME_SA6).srec
$(objcopy) -O binary --adjust-vma=0xE6320000 --srec-forceS3 $(OUTPUT_FILE_SA6) $(FILE_NAME_SA6).bin
###################################################
# Compile
###################################################
%.o:../%.c
$(CC) -c -I $< -o $@
.PHONY: clean
clean:
$(CL) *.bin *.map *.srec *.elf *.o
tools/renesas/rcar_layout_create/sa0.c 0 → 100644
View file @ a51443fa
/*
* Copyright (c) 2015-2018, Renesas Electronics Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#define RCAR_SA0_SIZE_SMALL (0) /* for E3 */
#define RCAR_SA0_SIZE_NORMAL (1) /* for H3/M3/M3N */
#define BL2_ADDRESS (0xE6304000) /* BL2 start address */
#if (RCAR_SA0_SIZE == RCAR_SA0_SIZE_SMALL)
#define BL2_SIZE (80*1024/4) /* BL2 size is 80KB(0x00005000) */
#else /* (RCAR_SA0_SIZE == RCAR_SA0_SIZE_SMALL) */
#define BL2_SIZE (170*1024/4) /* BL2 size is 170KB(0x0000AA00) */
#endif /* (RCAR_SA0_SIZE == RCAR_SA0_SIZE_SMALL) */
/* SA0 */
/* 0x00000000 */
const unsigned int __attribute__ ((section (".sa0_bootrom"))) bootrom_paramA = 0x00000100;
/* 0x00000080 (Map Type 3 for eMMC Boot)*/
/* 0x000001D4 */
const unsigned int __attribute__ ((section (".sa0_bl2dst_addr3"))) bl2dst_addr3 = BL2_ADDRESS;
/* 0x000002E4 */
const unsigned int __attribute__ ((section (".sa0_bl2dst_size3"))) bl2dst_size3 = BL2_SIZE;
/* 0x00000C00 (Map Type 1 for HyperFlash/QSPI Flash Boot)*/
/* 0x00000D54 */
const unsigned int __attribute__ ((section (".sa0_bl2dst_addr1"))) bl2dst_addr1 = BL2_ADDRESS;
/* 0x00000E64 */
const unsigned int __attribute__ ((section (".sa0_bl2dst_size1"))) bl2dst_size1 = BL2_SIZE;
tools/renesas/rcar_layout_create/sa0.ld.S 0 → 100644
View file @ a51443fa
/*
* Copyright (c) 2015-2017, Renesas Electronics Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
SECTIONS
{
. = 0x00000000;
.rodata : {
KEEP(*(.sa0_bootrom))
/* Map Type 3 for eMMC Boot */
/* A-side IPL content cert "Start Address" */
. = 0x000001D4; /* H'00000080 + H'00000154 */
KEEP(*(.sa0_bl2dst_addr3))
/* A-side IPL content cert "Size" */
. = 0x000002E4; /* H'00000080 + H'00000264 */
KEEP(*(.sa0_bl2dst_size3))
/* Map Type 1 for HyperFlash/QSPI Flash Boot */
/* A-side IPL content cert "Start Address" */
. = 0x00000D54; /* H'00000C00 + H'00000154 */
KEEP(*(.sa0_bl2dst_addr1))
/* A-side IPL content cert "Size" */
. = 0x00000E64; /* H'00000C00 + H'00000264 */
KEEP(*(.sa0_bl2dst_size1))
}
}
tools/renesas/rcar_layout_create/sa6.c 0 → 100644
View file @ a51443fa
/*
* Copyright (c) 2015-2017, Renesas Electronics Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <stdint.h>
#define RCAR_SA6_TYPE_HYPERFLASH (0)
#define RCAR_SA6_TYPE_EMMC (1)
#if (RCAR_SA6_TYPE == RCAR_SA6_TYPE_HYPERFLASH)
/* Number of content cert for Non-secure Target Program(BL33x) */
#define RCAR_IMAGE_NUM (0x00000001U)
/* Source address on flash for BL31 */
#define RCAR_BL31SRC_ADDRESS (0x001C0000U)
/* Reserved */
#define RCAR_BL31_PARTITION (0x00000000U)
/* Source address on flash for BL32 */
#define RCAR_BL32SRC_ADDRESS (0x00200000U)
/* Reserved */
#define RCAR_BL32_PARTITION (0x00000000U)
/* Source address on flash for BL33 */
#define RCAR_BL33SRC_ADDRESS (0x00640000U)
/* Reserved */
#define RCAR_BL33_PARTITION (0x00000000U)
#define RCAR_BL332SRC_ADDRESS (0x00000000U)
/* Reserved */
#define RCAR_BL332_PARTITION (0x00000000U)
#define RCAR_BL333SRC_ADDRESS (0x00000000U)
/* Reserved */
#define RCAR_BL333_PARTITION (0x00000000U)
#define RCAR_BL334SRC_ADDRESS (0x00000000U)
/* Reserved */
#define RCAR_BL334_PARTITION (0x00000000U)
#define RCAR_BL335SRC_ADDRESS (0x00000000U)
/* Reserved */
#define RCAR_BL335_PARTITION (0x00000000U)
#define RCAR_BL336SRC_ADDRESS (0x00000000U)
/* Reserved */
#define RCAR_BL336_PARTITION (0x00000000U)
#define RCAR_BL337SRC_ADDRESS (0x00000000U)
/* Reserved */
#define RCAR_BL337_PARTITION (0x00000000U)
#define RCAR_BL338SRC_ADDRESS (0x00000000U)
/* Reserved */
#define RCAR_BL338_PARTITION (0x00000000U)
#else /* RCAR_SA6_TYPE == RCAR_SA6_TYPE_HYPERFLASH */
/* Number of content cert for Non-secure Target Program(BL33x) */
#define RCAR_IMAGE_NUM (0x00000001U)
/* Source address on eMMC for BL31 */
#define RCAR_BL31SRC_ADDRESS (0x00040000U)
/* Source partition on eMMC for BL31 */
#define RCAR_BL31_PARTITION (0x00000001U)
/* Source address on eMMC for BL32 */
#define RCAR_BL32SRC_ADDRESS (0x00200000U)
/* Source partition on eMMC for BL32 */
#define RCAR_BL32_PARTITION (0x00000001U)
/* Source address on eMMC for BL33 */
#define RCAR_BL33SRC_ADDRESS (0x00000000U)
/* Source partition on eMMC for BL33 */
#define RCAR_BL33_PARTITION (0x00000002U)
/* Reserved */
#define RCAR_BL332SRC_ADDRESS (0x00000000U)
#define RCAR_BL332_PARTITION (0x00000000U)
/* Reserved */
#define RCAR_BL333SRC_ADDRESS (0x00000000U)
#define RCAR_BL333_PARTITION (0x00000000U)
/* Reserved */
#define RCAR_BL334SRC_ADDRESS (0x00000000U)
#define RCAR_BL334_PARTITION (0x00000000U)
/* Reserved */
#define RCAR_BL335SRC_ADDRESS (0x00000000U)
#define RCAR_BL335_PARTITION (0x00000000U)
/* Reserved */
#define RCAR_BL336SRC_ADDRESS (0x00000000U)
#define RCAR_BL336_PARTITION (0x00000000U)
/* Reserved */
#define RCAR_BL337SRC_ADDRESS (0x00000000U)
#define RCAR_BL337_PARTITION (0x00000000U)
/* Reserved */
#define RCAR_BL338SRC_ADDRESS (0x00000000U)
#define RCAR_BL338_PARTITION (0x00000000U)
#endif /* RCAR_SA6_TYPE == RCAR_SA6_TYPE_HYPERFLASH */
/* Destination address for BL31 */
#define RCAR_BL31DST_ADDRESS (0x44000000U)
#define RCAR_BL31DST_ADDRESSH (0x00000000U)
/* Destination size for BL31 */
#define RCAR_BL31DST_SIZE (0x00004000U)
/* Destination address for BL32 */
#define RCAR_BL32DST_ADDRESS (0x44100000U)
#define RCAR_BL32DST_ADDRESSH (0x00000000U)
/* Destination size for BL32 */
#define RCAR_BL32DST_SIZE (0x00040000U)
/* Destination address for BL33 */
#define RCAR_BL33DST_ADDRESS (0x50000000U)
#define RCAR_BL33DST_ADDRESSH (0x00000000U)
/* Destination size for BL33 */
#define RCAR_BL33DST_SIZE (0x00040000U)
/* Reserved */
#define RCAR_BL332DST_ADDRESS (0x00000000U)
#define RCAR_BL332DST_ADDRESSH (0x00000000U)
#define RCAR_BL332DST_SIZE (0x00000000U)
/* Reserved */
#define RCAR_BL333DST_ADDRESS (0x00000000U)
#define RCAR_BL333DST_ADDRESSH (0x00000000U)
#define RCAR_BL333DST_SIZE (0x00000000U)
/* Reserved */
#define RCAR_BL334DST_ADDRESS (0x00000000U)
#define RCAR_BL334DST_ADDRESSH (0x00000000U)
#define RCAR_BL334DST_SIZE (0x00000000U)
/* Reserved */
#define RCAR_BL335DST_ADDRESS (0x00000000U)
#define RCAR_BL335DST_ADDRESSH (0x00000000U)
#define RCAR_BL335DST_SIZE (0x00000000U)
/* Reserved */
#define RCAR_BL336DST_ADDRESS (0x00000000U)
#define RCAR_BL336DST_ADDRESSH (0x00000000U)
#define RCAR_BL336DST_SIZE (0x00000000U)
/* Reserved */
#define RCAR_BL337DST_ADDRESS (0x00000000U)
#define RCAR_BL337DST_ADDRESSH (0x00000000U)
#define RCAR_BL337DST_SIZE (0x00000000U)
/* Reserved */
#define RCAR_BL338DST_ADDRESS (0x00000000U)
#define RCAR_BL338DST_ADDRESSH (0x00000000U)
#define RCAR_BL338DST_SIZE (0x00000000U)
/* SA6 */
const uint64_t __attribute__ ((section (".sa6_image_num"))) image_num = RCAR_IMAGE_NUM;
const uint64_t __attribute__ ((section (".sa6_bl31src_addr"))) bl31src_addr = RCAR_BL31SRC_ADDRESS;
const uint64_t __attribute__ ((section (".sa6_bl31partition"))) bl31partition = RCAR_BL31_PARTITION;
const uint64_t __attribute__ ((section (".sa6_bl32src_addr"))) bl32src_addr = RCAR_BL32SRC_ADDRESS;
const uint64_t __attribute__ ((section (".sa6_bl32partition"))) bl32partition = RCAR_BL32_PARTITION;
const uint64_t __attribute__ ((section (".sa6_bl33src_addr"))) bl33src_addr = RCAR_BL33SRC_ADDRESS;
const uint64_t __attribute__ ((section (".sa6_bl33partition"))) bl33partition = RCAR_BL33_PARTITION;
const uint64_t __attribute__ ((section (".sa6_bl332src_addr"))) bl332src_addr = RCAR_BL332SRC_ADDRESS;
const uint64_t __attribute__ ((section (".sa6_bl332partition")))bl332partition = RCAR_BL332_PARTITION;
const uint64_t __attribute__ ((section (".sa6_bl333src_addr"))) bl333src_addr = RCAR_BL333SRC_ADDRESS;
const uint64_t __attribute__ ((section (".sa6_bl333partition")))bl333partition = RCAR_BL333_PARTITION;
const uint64_t __attribute__ ((section (".sa6_bl334src_addr"))) bl334src_addr = RCAR_BL334SRC_ADDRESS;
const uint64_t __attribute__ ((section (".sa6_bl334partition")))bl334partition = RCAR_BL334_PARTITION;
const uint64_t __attribute__ ((section (".sa6_bl335src_addr"))) bl335src_addr = RCAR_BL335SRC_ADDRESS;
const uint64_t __attribute__ ((section (".sa6_bl335partition")))bl335partition = RCAR_BL335_PARTITION;
const uint64_t __attribute__ ((section (".sa6_bl336src_addr"))) bl336src_addr = RCAR_BL336SRC_ADDRESS;
const uint64_t __attribute__ ((section (".sa6_bl336partition")))bl336partition = RCAR_BL336_PARTITION;
const uint64_t __attribute__ ((section (".sa6_bl337src_addr"))) bl337src_addr = RCAR_BL337SRC_ADDRESS;
const uint64_t __attribute__ ((section (".sa6_bl337partition")))bl337partition = RCAR_BL337_PARTITION;
const uint64_t __attribute__ ((section (".sa6_bl338src_addr"))) bl338src_addr = RCAR_BL338SRC_ADDRESS;
const uint64_t __attribute__ ((section (".sa6_bl338partition")))bl338partition = RCAR_BL338_PARTITION;
const uint32_t __attribute__ ((section (".sa6_bl31dst_addr"))) bl31dst_addr = RCAR_BL31DST_ADDRESS;
const uint32_t __attribute__ ((section (".sa6_bl31dst_addrh"))) bl31dst_addrh = RCAR_BL31DST_ADDRESSH;
const uint32_t __attribute__ ((section (".sa6_bl31dst_size"))) bl31dst_size = RCAR_BL31DST_SIZE;
const uint32_t __attribute__ ((section (".sa6_bl32dst_addr"))) bl32dst_addr = RCAR_BL32DST_ADDRESS;
const uint32_t __attribute__ ((section (".sa6_bl32dst_addrh"))) bl32dst_addrh = RCAR_BL32DST_ADDRESSH;
const uint32_t __attribute__ ((section (".sa6_bl32dst_size"))) bl32dst_size = RCAR_BL32DST_SIZE;
const uint32_t __attribute__ ((section (".sa6_bl33dst_addr"))) bl33dst_addr = RCAR_BL33DST_ADDRESS;
const uint32_t __attribute__ ((section (".sa6_bl33dst_addrh"))) bl33dst_addrh = RCAR_BL33DST_ADDRESSH;
const uint32_t __attribute__ ((section (".sa6_bl33dst_size"))) bl33dst_size = RCAR_BL33DST_SIZE;
const uint32_t __attribute__ ((section (".sa6_bl332dst_addr"))) bl332dst_addr = RCAR_BL332DST_ADDRESS;
const uint32_t __attribute__ ((section (".sa6_bl332dst_addrh")))bl332dst_addrh = RCAR_BL332DST_ADDRESSH;
const uint32_t __attribute__ ((section (".sa6_bl332dst_size"))) bl332dst_size = RCAR_BL332DST_SIZE;
const uint32_t __attribute__ ((section (".sa6_bl333dst_addr"))) bl333dst_addr = RCAR_BL333DST_ADDRESS;
const uint32_t __attribute__ ((section (".sa6_bl333dst_addrh")))bl333dst_addrh = RCAR_BL333DST_ADDRESSH;
const uint32_t __attribute__ ((section (".sa6_bl333dst_size"))) bl333dst_size = RCAR_BL333DST_SIZE;
const uint32_t __attribute__ ((section (".sa6_bl334dst_addr"))) bl334dst_addr = RCAR_BL334DST_ADDRESS;
const uint32_t __attribute__ ((section (".sa6_bl334dst_addrh")))bl334dst_addrh = RCAR_BL334DST_ADDRESSH;
const uint32_t __attribute__ ((section (".sa6_bl334dst_size"))) bl334dst_size = RCAR_BL334DST_SIZE;
const uint32_t __attribute__ ((section (".sa6_bl335dst_addr"))) bl335dst_addr = RCAR_BL335DST_ADDRESS;
const uint32_t __attribute__ ((section (".sa6_bl335dst_addrh")))bl335dst_addrh = RCAR_BL335DST_ADDRESSH;
const uint32_t __attribute__ ((section (".sa6_bl335dst_size"))) bl335dst_size = RCAR_BL335DST_SIZE;
const uint32_t __attribute__ ((section (".sa6_bl336dst_addr"))) bl336dst_addr = RCAR_BL336DST_ADDRESS;
const uint32_t __attribute__ ((section (".sa6_bl336dst_addrh")))bl336dst_addrh = RCAR_BL336DST_ADDRESSH;
const uint32_t __attribute__ ((section (".sa6_bl336dst_size"))) bl336dst_size = RCAR_BL336DST_SIZE;
const uint32_t __attribute__ ((section (".sa6_bl337dst_addr"))) bl337dst_addr = RCAR_BL337DST_ADDRESS;
const uint32_t __attribute__ ((section (".sa6_bl337dst_addrh")))bl337dst_addrh = RCAR_BL337DST_ADDRESSH;
const uint32_t __attribute__ ((section (".sa6_bl337dst_size"))) bl337dst_size = RCAR_BL337DST_SIZE;
const uint32_t __attribute__ ((section (".sa6_bl338dst_addr"))) bl338dst_addr = RCAR_BL338DST_ADDRESS;
const uint32_t __attribute__ ((section (".sa6_bl338dst_addrh")))bl338dst_addrh = RCAR_BL338DST_ADDRESSH;
const uint32_t __attribute__ ((section (".sa6_bl338dst_size"))) bl338dst_size = RCAR_BL338DST_SIZE;
tools/renesas/rcar_layout_create/sa6.ld.S 0 → 100644
View file @ a51443fa
/*
* Copyright (c) 2015-2017, Renesas Electronics Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
SECTIONS
{
. = 0x00000000;
.rodata : {
KEEP(*(.sa6_image_num))
. = 0x00000008;
KEEP(*(.sa6_bl31src_addr))
. = 0x00000010;
KEEP(*(.sa6_bl31partition))
. = 0x00000018;
KEEP(*(.sa6_bl32src_addr))
. = 0x00000020;
KEEP(*(.sa6_bl32partition))
. = 0x00000028;
KEEP(*(.sa6_bl33src_addr))
. = 0x00000030;
KEEP(*(.sa6_bl33partition))
. = 0x00000038;
KEEP(*(.sa6_bl332src_addr))
. = 0x00000040;
KEEP(*(.sa6_bl332partition))
. = 0x00000048;
KEEP(*(.sa6_bl333src_addr))
. = 0x00000050;
KEEP(*(.sa6_bl333partition))
. = 0x00000058;
KEEP(*(.sa6_bl334src_addr))
. = 0x00000060;
KEEP(*(.sa6_bl334partition))
. = 0x00000068;
KEEP(*(.sa6_bl335src_addr))
. = 0x00000070;
KEEP(*(.sa6_bl335partition))
. = 0x00000078;
KEEP(*(.sa6_bl336src_addr))
. = 0x00000080;
KEEP(*(.sa6_bl336partition))
. = 0x00000088;
KEEP(*(.sa6_bl337src_addr))
. = 0x00000090;
KEEP(*(.sa6_bl337partition))
. = 0x00000098;
KEEP(*(.sa6_bl338src_addr))
. = 0x000000A0;
KEEP(*(.sa6_bl338partition))
. = 0x00000554;
KEEP(*(.sa6_bl31dst_addr))
. = 0x00000558;
KEEP(*(.sa6_bl31dst_addrh))
. = 0x00000664;
KEEP(*(.sa6_bl31dst_size))
. = 0x00000D54;
KEEP(*(.sa6_bl32dst_addr))
. = 0x00000D58;
KEEP(*(.sa6_bl32dst_addrh))
. = 0x00000E64;
KEEP(*(.sa6_bl32dst_size))
. = 0x00001554;
KEEP(*(.sa6_bl33dst_addr))
. = 0x00001558;
KEEP(*(.sa6_bl33dst_addrh))
. = 0x00001664;
KEEP(*(.sa6_bl33dst_size))
. = 0x00001D54;
KEEP(*(.sa6_bl332dst_addr))
. = 0x00001D58;
KEEP(*(.sa6_bl332dst_addrh))
. = 0x00001E64;
KEEP(*(.sa6_bl332dst_size))
. = 0x00002554;
KEEP(*(.sa6_bl333dst_addr))
. = 0x00002558;
KEEP(*(.sa6_bl333dst_addrh))
. = 0x00002664;
KEEP(*(.sa6_bl333dst_size))
. = 0x00002D54;
KEEP(*(.sa6_bl334dst_addr))
. = 0x00002D58;
KEEP(*(.sa6_bl334dst_addrh))
. = 0x00002E64;
KEEP(*(.sa6_bl334dst_size))
. = 0x00003554;
KEEP(*(.sa6_bl335dst_addr))
. = 0x00003558;
KEEP(*(.sa6_bl335dst_addrh))
. = 0x00003664;
KEEP(*(.sa6_bl335dst_size))
. = 0x00003D54;
KEEP(*(.sa6_bl336dst_addr))
. = 0x00003D58;
KEEP(*(.sa6_bl336dst_addrh))
. = 0x00003E64;
KEEP(*(.sa6_bl336dst_size))
. = 0x00004554;
KEEP(*(.sa6_bl337dst_addr))
. = 0x00004558;
KEEP(*(.sa6_bl337dst_addrh))
. = 0x00004664;
KEEP(*(.sa6_bl337dst_size))
. = 0x00004D54;
KEEP(*(.sa6_bl338dst_addr))
. = 0x00004D58;
KEEP(*(.sa6_bl338dst_addrh))
. = 0x00004E64;
KEEP(*(.sa6_bl338dst_size))
}
}
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