From a561e41bf1d238572b272f4f97b2a21f473a29fa Mon Sep 17 00:00:00 2001
From: Andre Przywara <andre.przywara@arm.com>
Date: Wed, 24 Oct 2018 16:38:12 +0100
Subject: [PATCH] allwinner: power: add enable switches for DCDC1/5
The DCDC1 and DCDC5 power rails didn't specify the enable bits. This
isn't critical, since those rails are on by default (and are needed for
every board), but it is inconsistent.
Add the respective enable bits for those two rails.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
plat/allwinner/sun50i_a64/sunxi_power.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/plat/allwinner/sun50i_a64/sunxi_power.c b/plat/allwinner/sun50i_a64/sunxi_power.c
index 8db248b42..bc796c5d6 100644
--- a/plat/allwinner/sun50i_a64/sunxi_power.c
+++ b/plat/allwinner/sun50i_a64/sunxi_power.c
@@ -181,8 +181,8 @@ struct axp_regulator {
unsigned char switch_reg;
unsigned char switch_bit;
} regulators[] = {
- {"dcdc1", 1600, 3400, 100, NO_SPLIT, 0x20, 0xff, 9},
- {"dcdc5", 800, 1840, 10, 32, 0x24, 0xff, 9},
+ {"dcdc1", 1600, 3400, 100, NO_SPLIT, 0x20, 0x10, 0},
+ {"dcdc5", 800, 1840, 10, 32, 0x24, 0x10, 4},
{"dldo1", 700, 3300, 100, NO_SPLIT, 0x15, 0x12, 3},
{"dldo2", 700, 4200, 100, 27, 0x16, 0x12, 4},
{"dldo3", 700, 3300, 100, NO_SPLIT, 0x17, 0x12, 5},
--
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