Commit a6bd5ffb authored by Sandrine Bailleux's avatar Sandrine Bailleux Committed by Achin Gupta
Browse files

PSCI: Pool platform_mem_init() in common ARM platforms code

Now that the FVP mailbox is no longer zeroed, the function
platform_mem_init() does nothing both on FVP and on Juno. Therefore,
this patch pools it as the default implementation on ARM platforms.

Change-Id: I007220f4531f15e8b602c3368a1129a5e3a38d91
parent 804040d1
...@@ -38,7 +38,6 @@ ...@@ -38,7 +38,6 @@
.globl plat_secondary_cold_boot_setup .globl plat_secondary_cold_boot_setup
.globl plat_get_my_entrypoint .globl plat_get_my_entrypoint
.globl platform_mem_init
.globl plat_is_my_cpu_primary .globl plat_is_my_cpu_primary
.macro fvp_choose_gicmmap param1, param2, x_tmp, w_tmp, res .macro fvp_choose_gicmmap param1, param2, x_tmp, w_tmp, res
...@@ -156,18 +155,6 @@ _panic: ...@@ -156,18 +155,6 @@ _panic:
endfunc plat_get_my_entrypoint endfunc plat_get_my_entrypoint
/* ---------------------------------------------------------------------
* void platform_mem_init (void);
*
* Nothing to do on FVP, the Trusted SRAM is available straight away
* after reset.
* ---------------------------------------------------------------------
*/
func platform_mem_init
ret
endfunc platform_mem_init
func plat_is_my_cpu_primary func plat_is_my_cpu_primary
mrs x0, mpidr_el1 mrs x0, mpidr_el1
and x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK) and x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)
......
...@@ -34,6 +34,7 @@ ...@@ -34,6 +34,7 @@
.weak plat_my_core_pos .weak plat_my_core_pos
.globl plat_crash_console_init .globl plat_crash_console_init
.globl plat_crash_console_putc .globl plat_crash_console_putc
.globl platform_mem_init
/* ----------------------------------------------------- /* -----------------------------------------------------
...@@ -86,3 +87,12 @@ func plat_crash_console_putc ...@@ -86,3 +87,12 @@ func plat_crash_console_putc
mov_imm x1, PLAT_ARM_CRASH_UART_BASE mov_imm x1, PLAT_ARM_CRASH_UART_BASE
b console_core_putc b console_core_putc
endfunc plat_crash_console_putc endfunc plat_crash_console_putc
/* ---------------------------------------------------------------------
* We don't need to carry out any memory initialization on ARM
* platforms. The Secure RAM is accessible straight away.
* ---------------------------------------------------------------------
*/
func platform_mem_init
ret
endfunc platform_mem_init
...@@ -34,7 +34,6 @@ ...@@ -34,7 +34,6 @@
.weak plat_secondary_cold_boot_setup .weak plat_secondary_cold_boot_setup
.weak plat_get_my_entrypoint .weak plat_get_my_entrypoint
.weak platform_mem_init
.globl plat_arm_calc_core_pos .globl plat_arm_calc_core_pos
.weak plat_is_my_cpu_primary .weak plat_is_my_cpu_primary
...@@ -89,17 +88,6 @@ func plat_arm_calc_core_pos ...@@ -89,17 +88,6 @@ func plat_arm_calc_core_pos
ret ret
endfunc plat_arm_calc_core_pos endfunc plat_arm_calc_core_pos
/* -----------------------------------------------------
* void platform_mem_init(void);
*
* We don't need to carry out any memory initialization
* on CSS platforms. The Secure RAM is accessible straight away.
* -----------------------------------------------------
*/
func platform_mem_init
ret
endfunc platform_mem_init
/* ----------------------------------------------------- /* -----------------------------------------------------
* unsigned int plat_is_my_cpu_primary (void); * unsigned int plat_is_my_cpu_primary (void);
* *
......
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