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adam.huang
Arm Trusted Firmware
Commits
aa965e15
Commit
aa965e15
authored
Jul 20, 2017
by
davidcunado-arm
Committed by
GitHub
Jul 20, 2017
Browse files
Merge pull request #1029 from islmit01/im/fix_includes
Fix order of includes
parents
4deb7bcc
ee1ebbd1
Changes
93
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plat/nvidia/tegra/common/tegra_pm.c
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aa965e15
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@@ -7,9 +7,9 @@
#include <arch_helpers.h>
#include <assert.h>
#include <bl_common.h>
#include <console.h>
#include <context.h>
#include <context_mgmt.h>
#include <console.h>
#include <debug.h>
#include <memctrl.h>
#include <mmio.h>
...
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plat/nvidia/tegra/common/tegra_sip_calls.c
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aa965e15
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@@ -13,8 +13,8 @@
#include <memctrl.h>
#include <mmio.h>
#include <runtime_svc.h>
#include <tegra_private.h>
#include <tegra_platform.h>
#include <tegra_private.h>
/*******************************************************************************
* Common Tegra SiP SMCs
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plat/nvidia/tegra/soc/t132/plat_psci_handlers.c
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@@ -7,9 +7,9 @@
#include <arch.h>
#include <arch_helpers.h>
#include <assert.h>
#include <denver.h>
#include <debug.h>
#include <delay_timer.h>
#include <denver.h>
#include <flowctrl.h>
#include <mmio.h>
#include <platform_def.h>
...
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plat/nvidia/tegra/soc/t132/plat_secondary.c
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@@ -10,8 +10,8 @@
#include <denver.h>
#include <mmio.h>
#include <platform.h>
#include <psci.h>
#include <pmc.h>
#include <psci.h>
#include <tegra_def.h>
#define SB_CSR 0x0
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plat/nvidia/tegra/soc/t186/drivers/mce/ari.c
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@@ -10,8 +10,8 @@
#include <debug.h>
#include <delay_timer.h>
#include <denver.h>
#include <mmio.h>
#include <mce_private.h>
#include <mmio.h>
#include <platform.h>
#include <sys/errno.h>
#include <t18x_ari.h>
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plat/nvidia/tegra/soc/t186/drivers/mce/nvg.c
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@@ -8,8 +8,8 @@
#include <arch_helpers.h>
#include <debug.h>
#include <denver.h>
#include <mmio.h>
#include <mce_private.h>
#include <mmio.h>
#include <sys/errno.h>
#include <t18x_ari.h>
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plat/nvidia/tegra/soc/t210/plat_psci_handlers.c
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aa965e15
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@@ -8,12 +8,12 @@
#include <assert.h>
#include <debug.h>
#include <delay_timer.h>
#include <flowctrl.h>
#include <mmio.h>
#include <platform.h>
#include <platform_def.h>
#include <psci.h>
#include <pmc.h>
#include <
flowctrl
.h>
#include <
psci
.h>
#include <tegra_def.h>
#include <tegra_private.h>
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plat/qemu/dt.c
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aa965e15
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@@ -7,8 +7,8 @@
#include <debug.h>
#include <libfdt.h>
#include <psci.h>
#include "qemu_private.h"
#include <string.h>
#include "qemu_private.h"
static
int
append_psci_compatible
(
void
*
fdt
,
int
offs
,
const
char
*
str
)
{
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plat/qemu/qemu_bl2_setup.c
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@@ -9,9 +9,9 @@
#include <debug.h>
#include <libfdt.h>
#include <platform_def.h>
#include "qemu_private.h"
#include <string.h>
#include <utils.h>
#include "qemu_private.h"
/*
* The next 2 constants identify the extents of the code & RO data region.
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plat/qemu/qemu_common.c
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@@ -7,8 +7,8 @@
#include <arch_helpers.h>
#include <bl_common.h>
#include <platform_def.h>
#include "qemu_private.h"
#include <xlat_tables.h>
#include "qemu_private.h"
#define MAP_DEVICE0 MAP_REGION_FLAT(DEVICE0_BASE, \
DEVICE0_SIZE, \
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plat/qemu/qemu_pm.c
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@@ -8,8 +8,8 @@
#include <assert.h>
#include <debug.h>
#include <gicv2.h>
#include <platform_def.h>
#include <platform.h>
#include <platform_def.h>
#include <psci.h>
/*
...
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plat/qemu/topology.c
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@@ -6,8 +6,8 @@
#include <arch.h>
#include <platform_def.h>
#include "qemu_private.h"
#include <sys/types.h>
#include "qemu_private.h"
/* The power domain tree descriptor */
static
unsigned
char
power_domain_tree_desc
[]
=
{
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plat/rockchip/common/aarch64/platform_common.c
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@@ -9,11 +9,11 @@
#include <bl_common.h>
#include <cci.h>
#include <debug.h>
#include <string.h>
#include <xlat_tables.h>
#include <platform_def.h>
#include <plat_private.h>
#include <platform_def.h>
#include <string.h>
#include <utils.h>
#include <xlat_tables.h>
#ifdef PLAT_RK_CCI_BASE
static
const
int
cci_map
[]
=
{
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plat/rockchip/common/bl31_plat_setup.c
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@@ -11,8 +11,8 @@
#include <debug.h>
#include <generic_delay_timer.h>
#include <mmio.h>
#include <platform.h>
#include <plat_private.h>
#include <platform.h>
#include <platform_def.h>
/*******************************************************************************
...
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plat/rockchip/common/drivers/parameter/ddr_parameter.c
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@@ -9,8 +9,8 @@
#include <debug.h>
#include <delay_timer.h>
#include <mmio.h>
#include <platform_def.h>
#include <plat_private.h>
#include <platform_def.h>
#include <soc.h>
#include <string.h>
#include "ddr_parameter.h"
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plat/rockchip/common/drivers/parameter/ddr_parameter.h
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@@ -12,8 +12,8 @@
#include <debug.h>
#include <delay_timer.h>
#include <mmio.h>
#include <platform_def.h>
#include <plat_private.h>
#include <platform_def.h>
#include <soc.h>
#include <string.h>
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plat/rockchip/common/include/plat_private.h
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@@ -9,9 +9,9 @@
#ifndef __ASSEMBLY__
#include <mmio.h>
#include <psci.h>
#include <stdint.h>
#include <xlat_tables.h>
#include <psci.h>
#define __sramdata __attribute__((section(".sram.data")))
#define __sramconst __attribute__((section(".sram.rodata")))
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plat/rockchip/common/params_setup.c
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@@ -11,9 +11,9 @@
#include <debug.h>
#include <gpio.h>
#include <mmio.h>
#include <platform.h>
#include <plat_params.h>
#include <plat_private.h>
#include <platform.h>
#include <string.h>
static
struct
gpio_info
param_reset
;
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plat/rockchip/common/plat_pm.c
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aa965e15
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@@ -7,12 +7,12 @@
#include <arch_helpers.h>
#include <assert.h>
#include <console.h>
#include <errno.h>
#include <debug.h>
#include <psci.h>
#include <delay_timer.h>
#include <
platform_def
.h>
#include <
errno
.h>
#include <plat_private.h>
#include <platform_def.h>
#include <psci.h>
/* Macros to read the rk power domain state */
#define RK_CORE_PWR_STATE(state) \
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plat/rockchip/common/plat_topology.c
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@@ -5,8 +5,8 @@
*/
#include <arch.h>
#include <platform_def.h>
#include <plat_private.h>
#include <platform_def.h>
#include <psci.h>
/*******************************************************************************
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