Add support for Cortex-A57 erratum 833471 workaround

Change-Id: I86ac81ffd7cd094ce68c4cceb01c16563671a063

docs/cpu-specific-build-macros.md

@@ -72,6 +72,9 @@ For Cortex-A57, following errata build flags are defined :
 *   `ERRATA_A57_829520`: This applies errata 829520 workaround to Cortex-A57
      CPU. This needs to be enabled only for revision <= r1p2 of the CPU.
 
+*   `ERRATA_A57_833471`: This applies errata 833471 workaround to Cortex-A57
+     CPU. This needs to be enabled only for revision <= r1p2 of the CPU.
+
 3.  CPU Specific optimizations
 ------------------------------
 

include/lib/cpus/aarch64/cortex_a57.h

@@ -66,6 +66,7 @@
 #define CPUACTLR_DIS_OVERREAD		(1 << 52)
 #define CPUACTLR_NO_ALLOC_WBWA		(1 << 49)
 #define CPUACTLR_DCC_AS_DCCI		(1 << 44)
+#define CPUACTLR_FORCE_FPSCR_FLUSH	(1 << 38)
 #define CPUACTLR_DIS_STREAMING		(3 << 27)
 #define CPUACTLR_DIS_L1_STREAMING	(3 << 25)
 #define CPUACTLR_DIS_INDIRECT_PREDICTOR	(1 << 4)

lib/cpus/aarch64/cortex_a57.S

@@ -277,6 +277,32 @@ apply_829520:
 	ret
 endfunc errata_a57_829520_wa
 
+	/* ---------------------------------------------------
+	 * Errata Workaround for Cortex A57 Errata #833471.
+	 * This applies only to revision <= r1p2 of Cortex A57.
+	 * Inputs:
+	 * x0: variant[4:7] and revision[0:3] of current cpu.
+	 * Clobbers : x0 - x5
+	 * ---------------------------------------------------
+	 */
+func errata_a57_833471_wa
+	/*
+	 * Compare x0 against revision r1p2
+	 */
+	cmp	x0, #0x12
+	b.ls	apply_833471
+#if LOG_LEVEL >= LOG_LEVEL_VERBOSE
+	b	print_revision_warning
+#else
+	ret
+#endif
+apply_833471:
+	mrs	x1, CPUACTLR_EL1
+	orr	x1, x1, #CPUACTLR_FORCE_FPSCR_FLUSH
+	msr	CPUACTLR_EL1, x1
+	ret
+endfunc errata_a57_833471_wa
+
 	/* -------------------------------------------------
 	 * The CPU Ops reset function for Cortex-A57.
 	 * Clobbers: x0-x5, x15, x19, x30
@@ -330,6 +356,11 @@ func cortex_a57_reset_func
 	bl	errata_a57_829520_wa
 #endif
 
+#if ERRATA_A57_833471
+	mov	x0, x15
+	bl	errata_a57_833471_wa
+#endif
+
 	/* ---------------------------------------------
 	 * Enable the SMP bit.
 	 * ---------------------------------------------

lib/cpus/cpu-ops.mk

@@ -90,6 +90,10 @@ ERRATA_A57_828024	?=0
 # only to revision <= r1p2 of the Cortex A57 cpu.
 ERRATA_A57_829520	?=0
 
+# Flag to apply erratum 833471 workaround during reset. This erratum applies
+# only to revision <= r1p2 of the Cortex A57 cpu.
+ERRATA_A57_833471	?=0
+
 # Process ERRATA_A53_826319 flag
 $(eval $(call assert_boolean,ERRATA_A53_826319))
 $(eval $(call add_define,ERRATA_A53_826319))
@@ -121,3 +125,7 @@ $(eval $(call add_define,ERRATA_A57_828024))
 # Process ERRATA_A57_829520 flag
 $(eval $(call assert_boolean,ERRATA_A57_829520))
 $(eval $(call add_define,ERRATA_A57_829520))
+
+# Process ERRATA_A57_833471 flag
+$(eval $(call assert_boolean,ERRATA_A57_833471))
+$(eval $(call add_define,ERRATA_A57_833471))