Commit b3be0c70 authored by Sandrine Bailleux's avatar Sandrine Bailleux Committed by TrustedFirmware Code Review
Browse files

Merge "plat/arm, dts: Update platform device tree for CoT" into integration

parents 4c67cf32 2a0ef943
...@@ -350,14 +350,15 @@ ...@@ -350,14 +350,15 @@
* and limit. Leave enough space of BL2 meminfo. * and limit. Leave enough space of BL2 meminfo.
*/ */
#define ARM_FW_CONFIG_BASE (ARM_BL_RAM_BASE + sizeof(meminfo_t)) #define ARM_FW_CONFIG_BASE (ARM_BL_RAM_BASE + sizeof(meminfo_t))
#define ARM_FW_CONFIG_LIMIT (ARM_BL_RAM_BASE + PAGE_SIZE) #define ARM_FW_CONFIG_LIMIT ((ARM_BL_RAM_BASE + PAGE_SIZE) \
+ (PAGE_SIZE / 2U))
/* /*
* Boot parameters passed from BL2 to BL31/BL32 are stored here * Boot parameters passed from BL2 to BL31/BL32 are stored here
*/ */
#define ARM_BL2_MEM_DESC_BASE ARM_FW_CONFIG_LIMIT #define ARM_BL2_MEM_DESC_BASE (ARM_FW_CONFIG_LIMIT)
#define ARM_BL2_MEM_DESC_LIMIT (ARM_BL2_MEM_DESC_BASE + \ #define ARM_BL2_MEM_DESC_LIMIT (ARM_BL2_MEM_DESC_BASE \
(PAGE_SIZE / 2U)) + (PAGE_SIZE / 2U))
/* /*
* Define limit of firmware configuration memory: * Define limit of firmware configuration memory:
......
...@@ -14,7 +14,7 @@ ...@@ -14,7 +14,7 @@
tb_fw-config { tb_fw-config {
load-address = <0x0 0x4001300>; load-address = <0x0 0x4001300>;
max-size = <0x200>; max-size = <0x1800>;
id = <TB_FW_CONFIG_ID>; id = <TB_FW_CONFIG_ID>;
}; };
......
...@@ -85,4 +85,22 @@ ...@@ -85,4 +85,22 @@
load-address = <0x7100000>; load-address = <0x7100000>;
}; };
}; };
#if COT_DESC_IN_DTB
#include "cot_descriptors.dtsi"
#endif
};
#if COT_DESC_IN_DTB
#include "../fvp_def.h"
&trusted_nv_counter {
reg = <TFW_NVCTR_BASE>;
};
&non_trusted_nv_counter {
reg = <NTFW_CTR_BASE>;
}; };
#endif
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