Merge "allwinner: Clean up MMU setup" into integration

plat/allwinner/common/include/platform_def.h

@@ -32,7 +32,7 @@
 #define CACHE_WRITEBACK_SHIFT		6
 #define CACHE_WRITEBACK_GRANULE		(1 << CACHE_WRITEBACK_SHIFT)
 
-#define MAX_MMAP_REGIONS		(4 + PLATFORM_MMAP_REGIONS)
+#define MAX_MMAP_REGIONS		(3 + PLATFORM_MMAP_REGIONS)
 #define MAX_XLAT_TABLES			1
 
 #define PLAT_MAX_PWR_LVL_STATES		U(2)

plat/allwinner/common/sunxi_common.c

@@ -20,15 +20,15 @@
 
 static const mmap_region_t sunxi_mmap[PLATFORM_MMAP_REGIONS + 1] = {
 	MAP_REGION_FLAT(SUNXI_SRAM_BASE, SUNXI_SRAM_SIZE,
-			MT_MEMORY | MT_RW | MT_SECURE),
+			MT_RW_DATA | MT_SECURE),
 	MAP_REGION_FLAT(SUNXI_DEV_BASE, SUNXI_DEV_SIZE,
-			MT_DEVICE | MT_RW | MT_SECURE),
+			MT_DEVICE | MT_RW | MT_SECURE | MT_EXECUTE_NEVER),
 	MAP_REGION(SUNXI_DRAM_BASE, SUNXI_DRAM_VIRT_BASE, SUNXI_DRAM_SEC_SIZE,
-			MT_MEMORY | MT_RW | MT_SECURE),
+		   MT_RW_DATA | MT_SECURE),
 	MAP_REGION(PLAT_SUNXI_NS_IMAGE_OFFSET,
 		   SUNXI_DRAM_VIRT_BASE + SUNXI_DRAM_SEC_SIZE,
 		   SUNXI_DRAM_MAP_SIZE,
-		   MT_MEMORY | MT_RO | MT_NS),
+		   MT_RO_DATA | MT_NS),
 	{},
 };
 
@@ -48,9 +48,6 @@ uintptr_t plat_get_ns_image_entrypoint(void)
 
 void sunxi_configure_mmu_el3(int flags)
 {
-	mmap_add_region(BL31_BASE, BL31_BASE,
-			BL31_LIMIT - BL31_BASE,
-			MT_MEMORY | MT_RW | MT_SECURE);
 	mmap_add_region(BL_CODE_BASE, BL_CODE_BASE,
 			BL_CODE_END - BL_CODE_BASE,
 			MT_CODE | MT_SECURE);