Unverified Commit b51d4337 authored by Dimitris Papastamos's avatar Dimitris Papastamos Committed by GitHub
Browse files

Merge pull request #1565 from satheesbalya-arm/sb1_2332_fwu_sds_register

juno: Revert FWU update detect mechanism
parents 438e7894 4da6f6cd
...@@ -32,6 +32,9 @@ ...@@ -32,6 +32,9 @@
#define V2M_FUNC_SHUTDOWN 0x08 #define V2M_FUNC_SHUTDOWN 0x08
#define V2M_FUNC_REBOOT 0x09 #define V2M_FUNC_REBOOT 0x09
/* NVFLAGS in the V2M motherboard which is preserved after a watchdog reset */
#define V2M_SYS_NVFLAGS_ADDR (V2M_SYSREGS_BASE + V2M_SYS_NVFLAGS)
/* /*
* V2M sysled bit definitions. The values written to this * V2M sysled bit definitions. The values written to this
* register are defined in arch.h & runtime_svc.h. Only * register are defined in arch.h & runtime_svc.h. Only
......
...@@ -245,6 +245,8 @@ void plat_arm_interconnect_init(void); ...@@ -245,6 +245,8 @@ void plat_arm_interconnect_init(void);
void plat_arm_interconnect_enter_coherency(void); void plat_arm_interconnect_enter_coherency(void);
void plat_arm_interconnect_exit_coherency(void); void plat_arm_interconnect_exit_coherency(void);
void plat_arm_program_trusted_mailbox(uintptr_t address); void plat_arm_program_trusted_mailbox(uintptr_t address);
int plat_arm_bl1_fwu_needed(void);
void plat_arm_error_handler(int err);
#if ARM_PLAT_MT #if ARM_PLAT_MT
unsigned int plat_arm_get_cpu_pe_count(u_register_t mpidr); unsigned int plat_arm_get_cpu_pe_count(u_register_t mpidr);
......
...@@ -5,15 +5,72 @@ ...@@ -5,15 +5,72 @@
*/ */
#include <bl_common.h> #include <bl_common.h>
#include <debug.h>
#include <errno.h> #include <errno.h>
#include <plat_arm.h> #include <plat_arm.h>
#include <platform.h> #include <platform.h>
#include <sds.h>
#include <sp805.h> #include <sp805.h>
#include <tbbr_img_def.h> #include <tbbr_img_def.h>
#include <v2m_def.h> #include <v2m_def.h>
void juno_reset_to_aarch32_state(void); void juno_reset_to_aarch32_state(void);
static int is_watchdog_reset(void)
{
#if !CSS_USE_SCMI_SDS_DRIVER
#define RESET_REASON_WDOG_RESET (0x2)
const uint32_t *reset_flags_ptr = (const uint32_t *)SSC_GPRETN;
if ((*reset_flags_ptr & RESET_REASON_WDOG_RESET) != 0)
return 1;
return 0;
#else
int ret;
uint32_t scp_reset_synd_flags;
ret = sds_init();
if (ret != SDS_OK) {
ERROR("SCP SDS initialization failed\n");
panic();
}
ret = sds_struct_read(SDS_RESET_SYNDROME_STRUCT_ID,
SDS_RESET_SYNDROME_OFFSET,
&scp_reset_synd_flags,
SDS_RESET_SYNDROME_SIZE,
SDS_ACCESS_MODE_NON_CACHED);
if (ret != SDS_OK) {
ERROR("Getting reset reason from SDS failed\n");
panic();
}
/* Check if the WATCHDOG_RESET_BIT is set in the reset syndrome */
if (scp_reset_synd_flags & SDS_RESET_SYNDROME_AP_WD_RESET_BIT)
return 1;
return 0;
#endif
}
/*******************************************************************************
* The following function checks if Firmware update is needed,
* by checking if TOC in FIP image is valid or watchdog reset happened.
******************************************************************************/
int plat_arm_bl1_fwu_needed(void)
{
const uint32_t *nv_flags_ptr = (const uint32_t *)V2M_SYS_NVFLAGS_ADDR;
/* Check if TOC is invalid or watchdog reset happened. */
if ((arm_io_is_toc_valid() != 1) ||
(((*nv_flags_ptr == -EAUTH) || (*nv_flags_ptr == -ENOENT))
&& is_watchdog_reset()))
return 1;
return 0;
}
/******************************************************************************* /*******************************************************************************
* On JUNO update the arg2 with address of SCP_BL2U image info. * On JUNO update the arg2 with address of SCP_BL2U image info.
******************************************************************************/ ******************************************************************************/
......
/*
* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <arch_helpers.h>
#include <errno.h>
#include <platform.h>
#include <v2m_def.h>
/*
* Juno error handler
*/
void __dead2 plat_arm_error_handler(int err)
{
uint32_t *flags_ptr = (uint32_t *)V2M_SYS_NVFLAGS_ADDR;
/* Propagate the err code in the NV-flags register */
*flags_ptr = err;
/* Loop until the watchdog resets the system */
for (;;)
wfi();
}
...@@ -22,7 +22,12 @@ ifneq (${ENABLE_STACK_PROTECTOR}, 0) ...@@ -22,7 +22,12 @@ ifneq (${ENABLE_STACK_PROTECTOR}, 0)
JUNO_SECURITY_SOURCES += plat/arm/board/juno/juno_stack_protector.c JUNO_SECURITY_SOURCES += plat/arm/board/juno/juno_stack_protector.c
endif endif
PLAT_INCLUDES := -Iplat/arm/board/juno/include # Select SCMI/SDS drivers instead of SCPI/BOM driver for communicating with the
# SCP during power management operations and for SCP RAM Firmware transfer.
CSS_USE_SCMI_SDS_DRIVER := 1
PLAT_INCLUDES := -Iplat/arm/board/juno/include \
-Iplat/arm/css/drivers/sds
PLAT_BL_COMMON_SOURCES := plat/arm/board/juno/${ARCH}/juno_helpers.S PLAT_BL_COMMON_SOURCES := plat/arm/board/juno/${ARCH}/juno_helpers.S
...@@ -55,11 +60,13 @@ ifeq (${ARCH},aarch64) ...@@ -55,11 +60,13 @@ ifeq (${ARCH},aarch64)
BL1_SOURCES += lib/cpus/aarch64/cortex_a53.S \ BL1_SOURCES += lib/cpus/aarch64/cortex_a53.S \
lib/cpus/aarch64/cortex_a57.S \ lib/cpus/aarch64/cortex_a57.S \
lib/cpus/aarch64/cortex_a72.S \ lib/cpus/aarch64/cortex_a72.S \
plat/arm/board/juno/juno_err.c \
plat/arm/board/juno/juno_bl1_setup.c \ plat/arm/board/juno/juno_bl1_setup.c \
${JUNO_INTERCONNECT_SOURCES} \ ${JUNO_INTERCONNECT_SOURCES} \
${JUNO_SECURITY_SOURCES} ${JUNO_SECURITY_SOURCES}
BL2_SOURCES += lib/utils/mem_region.c \ BL2_SOURCES += lib/utils/mem_region.c \
plat/arm/board/juno/juno_err.c \
plat/arm/board/juno/juno_bl2_setup.c \ plat/arm/board/juno/juno_bl2_setup.c \
plat/arm/common/arm_nor_psci_mem_protect.c \ plat/arm/common/arm_nor_psci_mem_protect.c \
${JUNO_SECURITY_SOURCES} ${JUNO_SECURITY_SOURCES}
...@@ -76,6 +83,11 @@ BL31_SOURCES += lib/cpus/aarch64/cortex_a53.S \ ...@@ -76,6 +83,11 @@ BL31_SOURCES += lib/cpus/aarch64/cortex_a53.S \
${JUNO_GIC_SOURCES} \ ${JUNO_GIC_SOURCES} \
${JUNO_INTERCONNECT_SOURCES} \ ${JUNO_INTERCONNECT_SOURCES} \
${JUNO_SECURITY_SOURCES} ${JUNO_SECURITY_SOURCES}
ifeq (${CSS_USE_SCMI_SDS_DRIVER},1)
BL1_SOURCES += plat/arm/css/drivers/sds/sds.c
endif
endif endif
# Errata workarounds for Cortex-A53: # Errata workarounds for Cortex-A53:
...@@ -112,10 +124,6 @@ ARM_BOARD_OPTIMISE_MEM := 1 ...@@ -112,10 +124,6 @@ ARM_BOARD_OPTIMISE_MEM := 1
# Do not enable SVE # Do not enable SVE
ENABLE_SVE_FOR_NS := 0 ENABLE_SVE_FOR_NS := 0
# Select SCMI/SDS drivers instead of SCPI/BOM driver for communicating with the
# SCP during power management operations and for SCP RAM Firmware transfer.
CSS_USE_SCMI_SDS_DRIVER := 1
include plat/arm/board/common/board_css.mk include plat/arm/board/common/board_css.mk
include plat/arm/common/arm_common.mk include plat/arm/common/arm_common.mk
include plat/arm/soc/common/soc_css.mk include plat/arm/soc/common/soc_css.mk
......
...@@ -23,6 +23,8 @@ ...@@ -23,6 +23,8 @@
#pragma weak bl1_platform_setup #pragma weak bl1_platform_setup
#pragma weak bl1_plat_sec_mem_layout #pragma weak bl1_plat_sec_mem_layout
#pragma weak bl1_plat_prepare_exit #pragma weak bl1_plat_prepare_exit
#pragma weak bl1_plat_get_next_image_id
#pragma weak plat_arm_bl1_fwu_needed
#define MAP_BL1_TOTAL MAP_REGION_FLAT( \ #define MAP_BL1_TOTAL MAP_REGION_FLAT( \
bl1_tzram_layout.total_base, \ bl1_tzram_layout.total_base, \
...@@ -186,13 +188,22 @@ void bl1_plat_prepare_exit(entry_point_info_t *ep_info) ...@@ -186,13 +188,22 @@ void bl1_plat_prepare_exit(entry_point_info_t *ep_info)
#endif #endif
} }
/*
* On Arm platforms, the FWU process is triggered when the FIP image has
* been tampered with.
*/
int plat_arm_bl1_fwu_needed(void)
{
return (arm_io_is_toc_valid() != 1);
}
/******************************************************************************* /*******************************************************************************
* The following function checks if Firmware update is needed, * The following function checks if Firmware update is needed,
* by checking if TOC in FIP image is valid or not. * by checking if TOC in FIP image is valid or not.
******************************************************************************/ ******************************************************************************/
unsigned int bl1_plat_get_next_image_id(void) unsigned int bl1_plat_get_next_image_id(void)
{ {
if (!arm_io_is_toc_valid()) if (plat_arm_bl1_fwu_needed() != 0)
return NS_BL1U_IMAGE_ID; return NS_BL1U_IMAGE_ID;
return BL2_IMAGE_ID; return BL2_IMAGE_ID;
......
...@@ -13,10 +13,12 @@ ...@@ -13,10 +13,12 @@
#include <platform_def.h> #include <platform_def.h>
#include <stdint.h> #include <stdint.h>
#pragma weak plat_arm_error_handler
/* /*
* ARM common implementation for error handler * ARM common implementation for error handler
*/ */
void plat_error_handler(int err) void __dead2 plat_arm_error_handler(int err)
{ {
int ret; int ret;
...@@ -44,3 +46,8 @@ void plat_error_handler(int err) ...@@ -44,3 +46,8 @@ void plat_error_handler(int err)
for (;;) for (;;)
wfi(); wfi();
} }
void __dead2 plat_error_handler(int err)
{
plat_arm_error_handler(err);
}
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