Commit b8535929 authored by Andre Przywara's avatar Andre Przywara
Browse files

SPE: Fix feature detection



Currently the feature test for the SPE extension requires the feature
bits in the ID_AA64DFR0 register to read exactly 0b0001.
However the architecture guarantees that any values greater than 0
indicate the presence of a feature, which is what we are after in
our spe_supported() function.

Change the comparison to include all values greater than 0.

This fixes SPE support in non-secure world on implementations which
include the Scalable Vector Extension (SVE), for instance on Zeus cores.

Change-Id: If6cbd1b72d6abb8a303e2c0a7839d508f071cdbe
Signed-off-by: default avatarAndre Przywara <andre.przywara@arm.com>
parent 76a08094
...@@ -25,7 +25,7 @@ bool spe_supported(void) ...@@ -25,7 +25,7 @@ bool spe_supported(void)
uint64_t features; uint64_t features;
features = read_id_aa64dfr0_el1() >> ID_AA64DFR0_PMS_SHIFT; features = read_id_aa64dfr0_el1() >> ID_AA64DFR0_PMS_SHIFT;
return (features & ID_AA64DFR0_PMS_MASK) == 1U; return (features & ID_AA64DFR0_PMS_MASK) > 0ULL;
} }
void spe_enable(bool el2_unused) void spe_enable(bool el2_unused)
......
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