Commit bc0d8c74 authored by Manish Pandey's avatar Manish Pandey Committed by TrustedFirmware Code Review
Browse files

Merge changes I07c35829,Iec7dd019,Ic7406aa8,I4eac94f0 into integration

* changes:
  drivers: renesas: rcar: dma: Fix coding style
  drivers: renesas: rcar: delay: Fix checkpatch warnings
  drivers: renesas: rcar: avs: Fix checkpatch warnings
  drivers: renesas: rcar: auth: Use space instead of TAB
parents f422a7bf 240c9cbf
/* /*
* Copyright (c) 2015-2019, Renesas Electronics Corporation. All rights * Copyright (c) 2015-2020, Renesas Electronics Corporation. All rights
* reserved. * reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
...@@ -7,13 +7,12 @@ ...@@ -7,13 +7,12 @@
#include <stddef.h> #include <stddef.h>
#include <platform_def.h>
#include <arch_helpers.h> #include <arch_helpers.h>
#include <common/debug.h> #include <common/debug.h>
#include <lib/mmio.h> #include <lib/mmio.h>
#include <plat/common/platform.h> #include <plat/common/platform.h>
#include <platform_def.h>
#include "rom_api.h" #include "rom_api.h"
typedef int32_t(*secure_boot_api_f) (uint32_t a, uint32_t b, void *c); typedef int32_t(*secure_boot_api_f) (uint32_t a, uint32_t b, void *c);
...@@ -125,9 +124,9 @@ verify_image: ...@@ -125,9 +124,9 @@ verify_image:
#if RCAR_BL2_DCACHE == 1 #if RCAR_BL2_DCACHE == 1
/* enable */ /* enable */
write_sctlr_el3(read_sctlr_el3() | SCTLR_C_BIT); write_sctlr_el3(read_sctlr_el3() | SCTLR_C_BIT);
#endif #endif /* RCAR_BL2_DCACHE */
#endif #endif /* IMAGE_BL2 */
return ret; return ret;
} }
......
/* /*
* Copyright (c) 2015-2018, Renesas Electronics Corporation. All rights reserved. * Copyright (c) 2015-2020, Renesas Electronics Corporation. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
...@@ -8,8 +8,8 @@ ...@@ -8,8 +8,8 @@
#include <lib/mmio.h> #include <lib/mmio.h>
#include <lib/utils_def.h> #include <lib/utils_def.h>
#include "cpg_registers.h"
#include "avs_driver.h" #include "avs_driver.h"
#include "cpg_registers.h"
#include "rcar_def.h" #include "rcar_def.h"
#include "rcar_private.h" #include "rcar_private.h"
...@@ -87,9 +87,12 @@ ...@@ -87,9 +87,12 @@
#define ICCH_FREQ_16p66M (0x05U) /* for CP Phy 16.6666MHz */ #define ICCH_FREQ_16p66M (0x05U) /* for CP Phy 16.6666MHz */
/* PMIC */ /* PMIC */
#define PMIC_W_SLAVE_ADDRESS (0x60U) /* ROHM BD9571 slave address + (W) */ /* ROHM BD9571 slave address + (W) */
#define PMIC_R_SLAVE_ADDRESS (0x61U) /* ROHM BD9571 slave address + (R) */ #define PMIC_W_SLAVE_ADDRESS (0x60U)
#define PMIC_DVFS_SETVID (0x54U) /* ROHM BD9571 DVFS SetVID register */ /* ROHM BD9571 slave address + (R) */
#define PMIC_R_SLAVE_ADDRESS (0x61U)
/* ROHM BD9571 DVFS SetVID register */
#define PMIC_DVFS_SETVID (0x54U)
#endif /* PMIC_ROHM_BD9571 */ #endif /* PMIC_ROHM_BD9571 */
/* Individual information */ /* Individual information */
...@@ -102,7 +105,7 @@ typedef struct { ...@@ -102,7 +105,7 @@ typedef struct {
} initial_voltage_t; } initial_voltage_t;
static const initial_voltage_t init_vol_tbl[] = { static const initial_voltage_t init_vol_tbl[] = {
/* AVS code, RHOM BD9571 DVFS SetVID register */ /* AVS code, ROHM BD9571 DVFS SetVID register */
{0x00U, 0x53U}, /* AVS0, 0.83V */ {0x00U, 0x53U}, /* AVS0, 0.83V */
{0x01U, 0x52U}, /* AVS1, 0.82V */ {0x01U, 0x52U}, /* AVS1, 0.82V */
{0x02U, 0x51U}, /* AVS2, 0.81V */ {0x02U, 0x51U}, /* AVS2, 0.81V */
...@@ -188,7 +191,7 @@ void rcar_avs_init(void) ...@@ -188,7 +191,7 @@ void rcar_avs_init(void)
/* Disable I2C module and All internal registers initialized. */ /* Disable I2C module and All internal registers initialized. */
mmio_write_8(IIC_ICCR, 0x00U); mmio_write_8(IIC_ICCR, 0x00U);
while ((mmio_read_8(IIC_ICCR) & ICCR_ENABLE) != 0U) { while ((mmio_read_8(IIC_ICCR) & ICCR_ENABLE) != 0U) {
/* Disable I2C module and All internal registers initialized. */ /* Disable I2C module and all internal registers initialized. */
mmio_write_8(IIC_ICCR, 0x00U); mmio_write_8(IIC_ICCR, 0x00U);
} }
...@@ -283,8 +286,8 @@ void rcar_avs_setting(void) ...@@ -283,8 +286,8 @@ void rcar_avs_setting(void)
/* Dose efuse_avs exceed the number of */ /* Dose efuse_avs exceed the number of */
/* the tables? */ /* the tables? */
if (efuse_avs >= EFUSE_AVS_NUM) { if (efuse_avs >= EFUSE_AVS_NUM) {
ERROR("AVS number of eFuse is out " ERROR("%s%s=%u\n", "AVS number of ",
"of a range. number=%u\n", "eFuse is out of range. number",
efuse_avs); efuse_avs);
/* Infinite loop */ /* Infinite loop */
panic(); panic();
...@@ -417,7 +420,8 @@ void rcar_avs_end(void) ...@@ -417,7 +420,8 @@ void rcar_avs_end(void)
{ {
uint8_t addr = PMIC_DVFS_SETVID; uint8_t addr = PMIC_DVFS_SETVID;
uint8_t value = avs_read_pmic_reg(addr); uint8_t value = avs_read_pmic_reg(addr);
NOTICE("Read PMIC register. address=0x%x value=0x%x \n",
NOTICE("Read PMIC register. address=0x%x value=0x%x\n",
addr, value); addr, value);
} }
#endif #endif
...@@ -446,8 +450,8 @@ static avs_error_t avs_check_error(void) ...@@ -446,8 +450,8 @@ static avs_error_t avs_check_error(void)
avs_error_t ret; avs_error_t ret;
if ((mmio_read_8(IIC_ICSR) & ICSR_AL) == ICSR_AL) { if ((mmio_read_8(IIC_ICSR) & ICSR_AL) == ICSR_AL) {
NOTICE("Loss of arbitration is detected. " NOTICE("%s AVS status=%d Retry=%u\n",
"AVS status=%d Retry=%u\n", avs_status, avs_retry); "Loss of arbitration is detected.", avs_status, avs_retry);
/* Check of retry number of times */ /* Check of retry number of times */
if (avs_retry >= AVS_RETRY_NUM) { if (avs_retry >= AVS_RETRY_NUM) {
ERROR("AVS setting failed in retry. max=%u\n", ERROR("AVS setting failed in retry. max=%u\n",
...@@ -458,8 +462,8 @@ static avs_error_t avs_check_error(void) ...@@ -458,8 +462,8 @@ static avs_error_t avs_check_error(void)
/* Set the error detected to error status. */ /* Set the error detected to error status. */
ret = avs_error_al; ret = avs_error_al;
} else if ((mmio_read_8(IIC_ICSR) & ICSR_TACK) == ICSR_TACK) { } else if ((mmio_read_8(IIC_ICSR) & ICSR_TACK) == ICSR_TACK) {
NOTICE("Non-acknowledge is detected. " NOTICE("%s AVS status=%d Retry=%u\n",
"AVS status=%d Retry=%u\n", avs_status, avs_retry); "Non-acknowledge is detected.", avs_status, avs_retry);
/* Check of retry number of times */ /* Check of retry number of times */
if (avs_retry >= AVS_RETRY_NUM) { if (avs_retry >= AVS_RETRY_NUM) {
ERROR("AVS setting failed in retry. max=%u\n", ERROR("AVS setting failed in retry. max=%u\n",
...@@ -526,8 +530,10 @@ static uint8_t avs_read_pmic_reg(uint8_t addr) ...@@ -526,8 +530,10 @@ static uint8_t avs_read_pmic_reg(uint8_t addr)
/* Set frequency of 400kHz */ /* Set frequency of 400kHz */
avs_set_iic_clock(); avs_set_iic_clock();
/* Set ICIC.WAITE=1, ICIC.DTEE=1 to enable data transmission */ /*
/* interrupt and wait interrupt. */ * Set ICIC.WAITE=1, ICIC.DTEE=1 to enable data transmission
* interrupt and wait interrupt.
*/
mmio_write_8(IIC_ICIC, mmio_read_8(IIC_ICIC) | ICIC_WAITE | ICIC_DTEE); mmio_write_8(IIC_ICIC, mmio_read_8(IIC_ICIC) | ICIC_WAITE | ICIC_DTEE);
/* Write H'94 in ICCR to issue start condition */ /* Write H'94 in ICCR to issue start condition */
......
/* /*
* Copyright (c) 2018, Renesas Electronics Corporation. All rights reserved. * Copyright (c) 2018-2020, Renesas Electronics Corporation. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
#include <arch.h> #include <arch.h>
#include <arch_helpers.h> #include <arch_helpers.h>
#include "micro_delay.h" #include "micro_delay.h"
#define RCAR_CONV_MICROSEC 1000000U #define RCAR_CONV_MICROSEC 1000000U
void void
#if IMAGE_BL31 #if IMAGE_BL31
__attribute__ ((section (".system_ram"))) __attribute__ ((section(".system_ram")))
#endif #endif
rcar_micro_delay(uint64_t micro_sec) rcar_micro_delay(uint64_t micro_sec)
{ {
......
/* /*
* Copyright (c) 2015-2018, Renesas Electronics Corporation. All rights reserved. * Copyright (c) 2015-2020, Renesas Electronics Corporation. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
...@@ -11,8 +11,8 @@ ...@@ -11,8 +11,8 @@
#include <common/debug.h> #include <common/debug.h>
#include <lib/mmio.h> #include <lib/mmio.h>
#include "rcar_def.h"
#include "cpg_registers.h" #include "cpg_registers.h"
#include "rcar_def.h"
#include "rcar_private.h" #include "rcar_private.h"
/* DMA CHANNEL setting (0/16/32) */ /* DMA CHANNEL setting (0/16/32) */
...@@ -129,16 +129,16 @@ void rcar_dma_exec(uintptr_t dst, uint32_t src, uint32_t len) ...@@ -129,16 +129,16 @@ void rcar_dma_exec(uintptr_t dst, uint32_t src, uint32_t len)
} }
if (src & DMA_FRACTION_MASK) { if (src & DMA_FRACTION_MASK) {
ERROR("BL2: DMA - source address invalid (0x%x), " ERROR("BL2: DMA - src address invalid (0x%x), len=(0x%x)\n",
"length (0x%x)\n", src, dma_len); src, dma_len);
panic(); panic();
} }
if ((dst & UINT32_MAX) + dma_len > DMADAR_BOUNDARY_ADDR || if ((dst & UINT32_MAX) + dma_len > DMADAR_BOUNDARY_ADDR ||
(dst + dma_len > DMA_DST_LIMIT) || (dst + dma_len > DMA_DST_LIMIT) ||
(dst & DMA_FRACTION_MASK)) { (dst & DMA_FRACTION_MASK)) {
ERROR("BL2: DMA - destination address invalid (0x%lx), " ERROR("BL2: DMA - dest address invalid (0x%lx), len=(0x%x)\n",
"length (0x%x)\n", dst, dma_len); dst, dma_len);
panic(); panic();
} }
......
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