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adam.huang
Arm Trusted Firmware
Commits
bc3579b7
Commit
bc3579b7
authored
Jan 14, 2020
by
Manish Pandey
Committed by
TrustedFirmware Code Review
Jan 14, 2020
Browse files
Merge "intel: Fix memory calibration" into integration
parents
f1c94d1e
3d9f7264
Changes
2
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Side-by-side
plat/intel/soc/agilex/soc/agilex_memory_controller.c
View file @
bc3579b7
...
...
@@ -20,9 +20,8 @@
#define PRE_CALIBRATION_DELAY 1
#define POST_CALIBRATION_DELAY 1
#define TIMEOUT_EMIF_CALIBRATION 1000
#define CLEAR_EMIF_DELAY 50000
#define CLEAR_EMIF_TIMEOUT 0x100000
#define TIMEOUT_INT_RESP 10000
#define CLEAR_EMIF_DELAY 1000
#define CLEAR_EMIF_TIMEOUT 1000
#define DDR_CONFIG(A, B, C, R) (((A) << 24) | ((B) << 16) | ((C) << 8) | (R))
#define DDR_CONFIG_ELEMENTS (sizeof(ddr_config)/sizeof(uint32_t))
...
...
@@ -125,7 +124,7 @@ static int mem_calibration(void)
data
=
mmio_read_32
(
AGX_MPFE_HMC_ADP_DDRCALSTAT
);
if
(
AGX_MPFE_HMC_ADP_DDRCALSTAT_CAL
(
data
)
==
1
)
break
;
m
delay
(
1
);
u
delay
(
500
);
}
while
(
++
timeout
<
TIMEOUT_EMIF_CALIBRATION
);
if
(
AGX_MPFE_HMC_ADP_DDRCALSTAT_CAL
(
data
)
==
0
)
{
...
...
plat/intel/soc/stratix10/soc/s10_memory_controller.c
View file @
bc3579b7
...
...
@@ -22,10 +22,9 @@
#define MAX_MEM_CAL_RETRY 3
#define PRE_CALIBRATION_DELAY 1
#define POST_CALIBRATION_DELAY 1
#define TIMEOUT_EMIF_CALIBRATION 100
#define CLEAR_EMIF_DELAY 50000
#define CLEAR_EMIF_TIMEOUT 0x100000
#define TIMEOUT_INT_RESP 10000
#define TIMEOUT_EMIF_CALIBRATION 1000
#define CLEAR_EMIF_DELAY 1000
#define CLEAR_EMIF_TIMEOUT 1000
#define DDR_CONFIG(A, B, C, R) (((A) << 24) | ((B) << 16) | ((C) << 8) | (R))
#define DDR_CONFIG_ELEMENTS (sizeof(ddr_config)/sizeof(uint32_t))
...
...
@@ -128,7 +127,7 @@ static int mem_calibration(void)
data
=
mmio_read_32
(
S10_MPFE_HMC_ADP_DDRCALSTAT
);
if
(
S10_MPFE_HMC_ADP_DDRCALSTAT_CAL
(
data
)
==
1
)
break
;
udelay
(
1
);
udelay
(
500
);
}
while
(
++
timeout
<
TIMEOUT_EMIF_CALIBRATION
);
if
(
S10_MPFE_HMC_ADP_DDRCALSTAT_CAL
(
data
)
==
0
)
{
...
...
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