Commit be85f0f7 authored by Mithun Maragiri's avatar Mithun Maragiri Committed by Varun Wadekar
Browse files

Tegra210: disable ERRATA_A57_829520



ERRATA_A57_829520 disables "indirect branch prediction" for
EL1 on cpu reset, leading to 15% drop in CPU performance
with coremark benchmarks.

Tegra210 already has a hardware fix for ARM BUG#829520,so
this errata is not needed.

This patch disables the errata to get increased performance
numbers.

Change-Id: I0b42e8badd19a8101f6a55d80eb2d953597d3c20
Signed-off-by: default avatarMithun Maragiri <mmaragiri@nvidia.com>
parent a69a30ff
...@@ -46,7 +46,6 @@ A57_DISABLE_NON_TEMPORAL_HINT := 1 ...@@ -46,7 +46,6 @@ A57_DISABLE_NON_TEMPORAL_HINT := 1
ERRATA_A57_826974 := 1 ERRATA_A57_826974 := 1
ERRATA_A57_826977 := 1 ERRATA_A57_826977 := 1
ERRATA_A57_828024 := 1 ERRATA_A57_828024 := 1
ERRATA_A57_829520 := 1
ERRATA_A57_833471 := 1 ERRATA_A57_833471 := 1
# Enable workarounds for selected Cortex-A53 erratas. # Enable workarounds for selected Cortex-A53 erratas.
......
Markdown is supported
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment