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adam.huang
Arm Trusted Firmware
Commits
c125a14e
Unverified
Commit
c125a14e
authored
Jun 22, 2018
by
Dimitris Papastamos
Committed by
GitHub
Jun 22, 2018
Browse files
Merge pull request #1441 from robertovargas-arm/mem_protect_board
Move mem-protect definitions to board specific files
parents
cfd2e04a
e237c1ba
Changes
4
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include/plat/arm/board/common/board_arm_def.h
View file @
c125a14e
...
@@ -122,14 +122,6 @@
...
@@ -122,14 +122,6 @@
#define PLAT_ARM_NVM_BASE V2M_FLASH0_BASE
#define PLAT_ARM_NVM_BASE V2M_FLASH0_BASE
#define PLAT_ARM_NVM_SIZE (V2M_FLASH0_SIZE - V2M_FLASH_BLOCK_SIZE)
#define PLAT_ARM_NVM_SIZE (V2M_FLASH0_SIZE - V2M_FLASH_BLOCK_SIZE)
/* PSCI memory protect definitions:
* This variable is stored in a non-secure flash because some ARM reference
* platforms do not have secure NVRAM. Real systems that provided MEM_PROTECT
* support must use a secure NVRAM to store the PSCI MEM_PROTECT definitions.
*/
#define PLAT_ARM_MEM_PROT_ADDR (V2M_FLASH0_BASE + \
V2M_FLASH0_SIZE - V2M_FLASH_BLOCK_SIZE)
/*
/*
* Map mem_protect flash region with read and write permissions
* Map mem_protect flash region with read and write permissions
*/
*/
...
...
plat/arm/board/fvp/fvp_def.h
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c125a14e
...
@@ -142,4 +142,15 @@
...
@@ -142,4 +142,15 @@
#define FVP_NSAID_HDLCD0 2
#define FVP_NSAID_HDLCD0 2
#define FVP_NSAID_CLCD 7
#define FVP_NSAID_CLCD 7
/*******************************************************************************
* Memprotect definitions
******************************************************************************/
/* PSCI memory protect definitions:
* This variable is stored in a non-secure flash because some ARM reference
* platforms do not have secure NVRAM. Real systems that provided MEM_PROTECT
* support must use a secure NVRAM to store the PSCI MEM_PROTECT definitions.
*/
#define PLAT_ARM_MEM_PROT_ADDR (V2M_FLASH0_BASE + \
V2M_FLASH0_SIZE - V2M_FLASH_BLOCK_SIZE)
#endif
/* __FVP_DEF_H__ */
#endif
/* __FVP_DEF_H__ */
plat/arm/board/juno/juno_def.h
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c125a14e
...
@@ -79,4 +79,15 @@
...
@@ -79,4 +79,15 @@
#define JUNO_IRQ_GPU_SMMU_1 73
#define JUNO_IRQ_GPU_SMMU_1 73
#define JUNO_IRQ_ETR_SMMU 75
#define JUNO_IRQ_ETR_SMMU 75
/*******************************************************************************
* Memprotect definitions
******************************************************************************/
/* PSCI memory protect definitions:
* This variable is stored in a non-secure flash because some ARM reference
* platforms do not have secure NVRAM. Real systems that provided MEM_PROTECT
* support must use a secure NVRAM to store the PSCI MEM_PROTECT definitions.
*/
#define PLAT_ARM_MEM_PROT_ADDR (V2M_FLASH0_BASE + \
V2M_FLASH0_SIZE - V2M_FLASH_BLOCK_SIZE)
#endif
/* __JUNO_DEF_H__ */
#endif
/* __JUNO_DEF_H__ */
plat/arm/css/sgi/include/platform_def.h
View file @
c125a14e
...
@@ -96,4 +96,16 @@
...
@@ -96,4 +96,16 @@
GET_SSC_VERSION_CONFIG(mmio_read_32(SSC_VERSION))
GET_SSC_VERSION_CONFIG(mmio_read_32(SSC_VERSION))
#endif
/* __ASSEMBLY__ */
#endif
/* __ASSEMBLY__ */
/*******************************************************************************
* Memprotect definitions
******************************************************************************/
/* PSCI memory protect definitions:
* This variable is stored in a non-secure flash because some ARM reference
* platforms do not have secure NVRAM. Real systems that provided MEM_PROTECT
* support must use a secure NVRAM to store the PSCI MEM_PROTECT definitions.
*/
#define PLAT_ARM_MEM_PROT_ADDR (V2M_FLASH0_BASE + \
V2M_FLASH0_SIZE - V2M_FLASH_BLOCK_SIZE)
#endif
/* __PLATFORM_DEF_H__ */
#endif
/* __PLATFORM_DEF_H__ */
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