Merge pull request #179 from jcastillo-arm/jc/tf-issues/219

Call platform_is_primary_cpu() only from reset handler

bl2/aarch64/bl2_entrypoint.S

@@ -47,16 +47,6 @@ func bl2_entrypoint
 	mov	x20, x0
 	mov	x21, x1
 
-	/* ---------------------------------------------
-	 * This is BL2 which is expected to be executed
-	 * only by the primary cpu (at least for now).
-	 * So, make sure no secondary has lost its way.
-	 * ---------------------------------------------
-	 */
-	mrs	x0, mpidr_el1
-	bl	platform_is_primary_cpu
-	cbz	x0, _panic
-
 	/* ---------------------------------------------
 	 * Set the exception vector to something sane.
 	 * ---------------------------------------------

bl31/aarch64/bl31_entrypoint.S

@@ -129,16 +129,6 @@ func bl31_entrypoint
 	 */
 	wait_for_entrypoint
 	bl	platform_mem_init
-#else
-	/* ---------------------------------------------
-	 * This is BL31 which is expected to be executed
-	 * only by the primary cpu (at least for now).
-	 * So, make sure no secondary has lost its way.
-	 * ---------------------------------------------
-	 */
-	mrs	x0, mpidr_el1
-	bl	platform_is_primary_cpu
-	cbz	x0, _panic
 #endif
 
 	/* ---------------------------------------------

bl32/tsp/aarch64/tsp_entrypoint.S

@@ -71,16 +71,6 @@
 
 func tsp_entrypoint
 
-	/* ---------------------------------------------
-	 * The entrypoint is expected to be executed
-	 * only by the primary cpu (at least for now).
-	 * So, make sure no secondary has lost its way.
-	 * ---------------------------------------------
-	 */
-	mrs	x0, mpidr_el1
-	bl	platform_is_primary_cpu
-	cbz	x0, tsp_entrypoint_panic
-
 	/* ---------------------------------------------
 	 * Set the exception vector to something sane.
 	 * ---------------------------------------------

docs/porting-guide.md

@@ -150,11 +150,6 @@ file is found in [plat/fvp/include/platform_def.h].
     Defines the total number of nodes in the affinity heirarchy at all affinity
     levels used by the platform.
 
-*   **#define : PRIMARY_CPU**
-
-    Defines the `MPIDR` of the primary CPU on the platform. This value is used
-    after a cold boot to distinguish between primary and secondary CPUs.
-
 *   **#define : TZROM_BASE**
 
     Defines the base address of secure ROM on the platform, where the BL1 binary
@@ -360,6 +355,17 @@ requires them.
 This function fulfills requirement 2 above.
 
 
+### Function : platform_is_primary_cpu() [mandatory]
+
+    Argument : unsigned long
+    Return   : unsigned int
+
+This function identifies a CPU by its `MPIDR`, which is passed as the argument,
+to determine whether this CPU is the primary CPU or a secondary CPU. A return
+value of zero indicates that the CPU is not the primary CPU, while a non-zero
+return value indicates that the CPU is the primary CPU.
+
+
 ### Function : platform_mem_init() [mandatory]
 
     Argument : void
@@ -398,17 +404,6 @@ maximum of 4 CPUs:
     cluster_id = 8-bit value in MPIDR at affinity level 1
 
 
-### Function : platform_is_primary_cpu()
-
-    Argument : unsigned long
-    Return   : unsigned int
-
-This function identifies a CPU by its `MPIDR`, which is passed as the argument,
-to determine whether this CPU is the primary CPU or a secondary CPU. A return
-value of zero indicates that the CPU is not the primary CPU, while a non-zero
-return value indicates that the CPU is the primary CPU.
-
-
 ### Function : platform_set_stack()
 
     Argument : unsigned long

plat/common/aarch64/platform_helpers.S

@@ -34,7 +34,6 @@
 
 
 	.weak	platform_get_core_pos
-	.weak	platform_is_primary_cpu
 	.weak	platform_check_mpidr
 	.weak	plat_report_exception
 	.weak	plat_crash_console_init
@@ -52,19 +51,6 @@ func platform_get_core_pos
 	add	x0, x1, x0, LSR #6
 	ret
 
-	/* -----------------------------------------------------
-	 * void platform_is_primary_cpu (unsigned int mpid);
-	 *
-	 * Given the mpidr say whether this cpu is the primary
-	 * cpu (applicable ony after a cold boot)
-	 * -----------------------------------------------------
-	 */
-func platform_is_primary_cpu
-	and	x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)
-	cmp	x0, #PRIMARY_CPU
-	cset	x0, eq
-	ret
-
 	/* -----------------------------------------------------
 	 * Placeholder function which should be redefined by
 	 * each platform.

plat/fvp/aarch64/fvp_helpers.S

@@ -40,6 +40,7 @@
 	.globl	plat_secondary_cold_boot_setup
 	.globl	platform_mem_init
 	.globl	plat_report_exception
+	.globl	platform_is_primary_cpu
 	.globl	plat_crash_console_init
 	.globl	plat_crash_console_putc
 
@@ -191,6 +192,12 @@ func plat_report_exception
 	str	w0, [x1]
 	ret
 
+func platform_is_primary_cpu
+	and	x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)
+	cmp	x0, #FVP_PRIMARY_CPU
+	cset	x0, eq
+	ret
+
 	/* Define a crash console for the plaform */
 #define FVP_CRASH_CONSOLE_BASE		PL011_UART0_BASE
 

plat/fvp/fvp_def.h

@@ -36,6 +36,7 @@
 
 /* Firmware Image Package */
 #define FIP_IMAGE_NAME			"fip.bin"
+#define FVP_PRIMARY_CPU			0x0
 
 /*******************************************************************************
  * FVP memory map related constants

plat/fvp/include/platform_def.h

@@ -70,7 +70,6 @@
 #define PLATFORM_MAX_CPUS_PER_CLUSTER	4
 #define PLATFORM_NUM_AFFS		(PLATFORM_CLUSTER_COUNT + \
 					 PLATFORM_CORE_COUNT)
-#define PRIMARY_CPU			0x0
 #define MAX_IO_DEVICES			3
 #define MAX_IO_HANDLES			4