Standardise header guards across codebase

All identifiers, regardless of use, that start with two underscores are
reserved. This means they can't be used in header guards.

The style that this project is now to use the full name of the file in
capital letters followed by 'H'. For example, for a file called
"uart_example.h", the header guard is UART_EXAMPLE_H.

The exceptions are files that are imported from other projects:

- CryptoCell driver
- dt-bindings folders
- zlib headers

Change-Id: I50561bf6c88b491ec440d0c8385c74650f3c106e
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

plat/rockchip/rk3328/drivers/soc/soc.h

@@ -4,8 +4,8 @@
  * SPDX-License-Identifier: BSD-3-Clause
  */
 
-#ifndef __SOC_H__
-#define __SOC_H__
+#ifndef SOC_H
+#define SOC_H
 
 /******************************* stimer ***************************************/
 #define TIMER_LOADE_COUNT0	0x00
@@ -110,4 +110,4 @@ enum plls_id {
 #define GPIO2_D2_GPIO_MODE	0x30
 #define GRF_GPIO2D_IOMUX	0x34
 
-#endif /* __SOC_H__ */
+#endif /* SOC_H */

plat/rockchip/rk3328/include/plat.ld.S

@@ -3,8 +3,8 @@
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
-#ifndef __ROCKCHIP_PLAT_LD_S__
-#define __ROCKCHIP_PLAT_LD_S__
+#ifndef ROCKCHIP_PLAT_LD_S
+#define ROCKCHIP_PLAT_LD_S
 
 MEMORY {
     PMUSRAM (rwx): ORIGIN = PMUSRAM_BASE, LENGTH = PMUSRAM_RSIZE
@@ -34,4 +34,4 @@ SECTIONS
 	} >PMUSRAM
 }
 
-#endif /* __ROCKCHIP_PLAT_LD_S__ */
+#endif /* ROCKCHIP_PLAT_LD_S */

plat/rockchip/rk3328/rk3328_def.h

@@ -4,8 +4,8 @@
  * SPDX-License-Identifier: BSD-3-Clause
  */
 
-#ifndef __PLAT_DEF_H__
-#define __PLAT_DEF_H__
+#ifndef RK3328_DEF_H
+#define RK3328_DEF_H
 
 #define MAJOR_VERSION		(1)
 #define MINOR_VERSION		(2)
@@ -145,4 +145,4 @@
 #define SHARE_MEM_PAGE_NUM      15
 #define SHARE_MEM_SIZE          SIZE_K(SHARE_MEM_PAGE_NUM * 4)
 
-#endif /* __PLAT_DEF_H__ */
+#endif /* RK3328_DEF_H */

plat/rockchip/rk3368/drivers/ddr/ddr_rk3368.h

@@ -4,8 +4,8 @@
  * SPDX-License-Identifier: BSD-3-Clause
  */
 
-#ifndef __DDR_RK3368_H__
-#define __DDR_RK3368_H__
+#ifndef DDR_RK3368_H
+#define DDR_RK3368_H
 
 #define DDR_PCTL_SCFG		0x0
 #define DDR_PCTL_SCTL		0x4
@@ -244,4 +244,4 @@ uint32_t ddr_get_resume_data_size(void);
 uint32_t *ddr_get_resume_code_base(void);
 void ddr_reg_save(uint32_t pllpdstat, uint64_t base_addr);
 
-#endif
+#endif /* DDR_RK3368_H */

plat/rockchip/rk3368/drivers/pmu/pmu.h

@@ -4,8 +4,8 @@
  * SPDX-License-Identifier: BSD-3-Clause
  */
 
-#ifndef __PMU_H__
-#define __PMU_H__
+#ifndef PMU_H
+#define PMU_H
 
 /* Allocate sp reginon in pmusram */
 #define PSRAM_SP_SIZE		0x80
@@ -204,4 +204,4 @@ enum pmu_bus_idle_st {
 
 #define MAX_WAIT_CONUT 1000
 
-#endif /* __PMU_H__ */
+#endif /* PMU_H */

plat/rockchip/rk3368/drivers/soc/soc.h

@@ -4,8 +4,8 @@
  * SPDX-License-Identifier: BSD-3-Clause
  */
 
-#ifndef __SOC_H__
-#define __SOC_H__
+#ifndef SOC_H
+#define SOC_H
 
 enum plls_id {
 	ABPLL_ID = 0,
@@ -138,4 +138,4 @@ void regs_updata_bits(uintptr_t addr, uint32_t val,
 void soc_sleep_config(void);
 void pm_plls_resume(void);
 
-#endif /* __SOC_H__ */
+#endif /* SOC_H */

plat/rockchip/rk3368/include/plat.ld.S

@@ -3,8 +3,8 @@
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
-#ifndef __ROCKCHIP_PLAT_LD_S__
-#define __ROCKCHIP_PLAT_LD_S__
+#ifndef ROCKCHIP_PLAT_LD_S
+#define ROCKCHIP_PLAT_LD_S
 
 MEMORY {
     PMUSRAM (rwx): ORIGIN = PMUSRAM_BASE, LENGTH = PMUSRAM_RSIZE
@@ -34,4 +34,4 @@ SECTIONS
 	} >PMUSRAM
 }
 
-#endif /* __ROCKCHIP_PLAT_LD_S__ */
+#endif /* ROCKCHIP_PLAT_LD_S */

plat/rockchip/rk3368/include/plat_sip_calls.h

@@ -4,9 +4,9 @@
  * SPDX-License-Identifier: BSD-3-Clause
  */
 
-#ifndef __PLAT_SIP_CALLS_H__
-#define __PLAT_SIP_CALLS_H__
+#ifndef PLAT_SIP_CALLS_H
+#define PLAT_SIP_CALLS_H
 
 #define RK_PLAT_SIP_NUM_CALLS	0
 
-#endif /* __PLAT_SIP_CALLS_H__ */
+#endif /* PLAT_SIP_CALLS_H */

plat/rockchip/rk3368/rk3368_def.h

@@ -4,8 +4,8 @@
  * SPDX-License-Identifier: BSD-3-Clause
  */
 
-#ifndef __PLAT_DEF_H__
-#define __PLAT_DEF_H__
+#ifndef RK3368_DEF_H
+#define RK3368_DEF_H
 
 /* Special value used to verify platform parameters from BL2 to BL3-1 */
 #define RK_BL31_PLAT_PARAM_VAL	0x0f1e2d3c4b5a6978ULL
@@ -104,4 +104,4 @@
 	INTR_PROP_DESC(RK_IRQ_SEC_PHY_TIMER, GIC_HIGHEST_SEC_PRIORITY,	\
 		       GICV2_INTR_GROUP1, GIC_INTR_CFG_LEVEL)
 
-#endif /* __PLAT_DEF_H__ */
+#endif /* RK3368_DEF_H */

plat/rockchip/rk3399/drivers/dp/cdn_dp.h

@@ -4,8 +4,9 @@
  * SPDX-License-Identifier: BSD-3-Clause
  */
 
-#ifndef __SOC_ROCKCHIP_RK3399_DP_H__
-#define __SOC_ROCKCHIP_RK3399_DP_H__
+#ifndef CDN_DP_H
+#define CDN_DP_H
+
 #include <plat_private.h>
 
 enum {
@@ -44,4 +45,5 @@ uint64_t dp_hdcp_store_key(uint64_t x1,
 			   uint64_t x4,
 			   uint64_t x5,
 			   uint64_t x6);
-#endif
+
+#endif /* CDN_DP_H */

plat/rockchip/rk3399/drivers/dram/dfs.h

@@ -4,8 +4,8 @@
  * SPDX-License-Identifier: BSD-3-Clause
  */
 
-#ifndef __SOC_ROCKCHIP_RK3399_DFS_H__
-#define __SOC_ROCKCHIP_RK3399_DFS_H__
+#ifndef DFS_H
+#define DFS_H
 
 #include <stdint.h>
 
@@ -47,4 +47,4 @@ void dram_dfs_init(void);
 void ddr_prepare_for_sys_suspend(void);
 void ddr_prepare_for_sys_resume(void);
 
-#endif
+#endif /* DFS_H */

plat/rockchip/rk3399/drivers/dram/dram.h

@@ -4,8 +4,8 @@
  * SPDX-License-Identifier: BSD-3-Clause
  */
 
-#ifndef __SOC_ROCKCHIP_RK3399_DRAM_H__
-#define __SOC_ROCKCHIP_RK3399_DRAM_H__
+#ifndef DRAM_H
+#define DRAM_H
 
 #include <dram_regs.h>
 #include <plat_private.h>
@@ -152,4 +152,4 @@ extern __sramdata struct rk3399_sdram_params sdram_config;
 
 void dram_init(void);
 
-#endif
+#endif /* DRAM_H */

plat/rockchip/rk3399/drivers/dram/dram_spec_timing.h

@@ -4,8 +4,9 @@
  * SPDX-License-Identifier: BSD-3-Clause
  */
 
-#ifndef _DRAM_SPEC_TIMING_HEAD_
-#define _DRAM_SPEC_TIMING_HEAD_
+#ifndef DRAM_SPEC_TIMING_H
+#define DRAM_SPEC_TIMING_H
+
 #include <stdint.h>
 
 enum ddr3_speed_rate {
@@ -503,4 +504,4 @@ struct timing_related_config {
 void dram_get_parameter(struct timing_related_config *timing_config,
 			struct dram_timing_t *pdram_timing);
 
-#endif /* _DRAM_SPEC_TIMING_HEAD_ */
+#endif /* DRAM_SPEC_TIMING_H */

plat/rockchip/rk3399/drivers/dram/suspend.h

@@ -4,8 +4,9 @@
  * SPDX-License-Identifier: BSD-3-Clause
  */
 
-#ifndef __SOC_ROCKCHIP_RK3399_SUSPEND_H__
-#define __SOC_ROCKCHIP_RK3399_SUSPEND_H__
+#ifndef SUSPEND_H
+#define SUSPEND_H
+
 #include <dram.h>
 
 #define KHz (1000)
@@ -22,4 +23,4 @@
 void dmc_suspend(void);
 __pmusramfunc void dmc_resume(void);
 
-#endif /* __DRAM_H__ */
+#endif /* SUSPEND_H */

plat/rockchip/rk3399/drivers/m0/include/addressmap.h

@@ -4,12 +4,12 @@
  * SPDX-License-Identifier: BSD-3-Clause
  */
 
-#ifndef __ROCKCHIP_RK3399_M0_INCLUDE_SHARED_ADDRESSMAP_H__
-#define __ROCKCHIP_RK3399_M0_INCLUDE_SHARED_ADDRESSMAP_H__
+#ifndef ADDRESSMAP_H
+#define ADDRESSMAP_H
 
 #include <addressmap_shared.h>
 
 /* Registers base address for M0 */
 #define MMIO_BASE			0x40000000
 
-#endif /* __ROCKCHIP_RK3399_M0_INCLUDE_SHARED_ADDRESSMAP_H__ */
+#endif /* ADDRESSMAP_H */

plat/rockchip/rk3399/drivers/m0/include/rk3399_mcu.h

@@ -4,8 +4,8 @@
  * SPDX-License-Identifier: BSD-3-Clause
  */
 
-#ifndef __RK3399_MCU_H__
-#define __RK3399_MCU_H__
+#ifndef RK3399_MCU_H
+#define RK3399_MCU_H
 
 #include <addressmap.h>
 
@@ -29,4 +29,4 @@ void stopwatch_init_usecs_expire(unsigned int usecs);
 int stopwatch_expired(void);
 void stopwatch_reset(void);
 
-#endif /* __RK3399_MCU_H__ */
+#endif /* RK3399_MCU_H */

plat/rockchip/rk3399/drivers/pmu/m0_ctl.h

@@ -4,8 +4,8 @@
  * SPDX-License-Identifier: BSD-3-Clause
  */
 
-#ifndef __M0_CTL_H__
-#define __M0_CTL_H__
+#ifndef M0_CTL_H
+#define M0_CTL_H
 
 #include <m0_param.h>
 
@@ -25,4 +25,5 @@ extern void m0_start(void);
 extern void m0_stop(void);
 extern void m0_wait_done(void);
 extern void m0_configure_execute_addr(uintptr_t addr);
-#endif /* __M0_CTL_H__ */
+
+#endif /* M0_CTL_H */

plat/rockchip/rk3399/drivers/pmu/pmu.h

@@ -4,8 +4,8 @@
  * SPDX-License-Identifier: BSD-3-Clause
  */
 
-#ifndef __PMU_H__
-#define __PMU_H__
+#ifndef PMU_H
+#define PMU_H
 
 #include <pmu_bits.h>
 #include <pmu_regs.h>
@@ -137,4 +137,4 @@ extern uint32_t clst_warmboot_data[PLATFORM_CLUSTER_COUNT];
 
 extern void sram_func_set_ddrctl_pll(uint32_t pll_src);
 
-#endif /* __PMU_H__ */
+#endif /* PMU_H */

plat/rockchip/rk3399/drivers/pwm/pwm.h

@@ -4,10 +4,10 @@
  * SPDX-License-Identifier: BSD-3-Clause
  */
 
-#ifndef __PWM_H__
-#define __PWM_H__
+#ifndef PWM_H
+#define PWM_H
 
 void disable_pwms(void);
 void enable_pwms(void);
 
-#endif
+#endif /* PWM_H */

plat/rockchip/rk3399/drivers/secure/secure.h

@@ -4,8 +4,8 @@
  * SPDX-License-Identifier: BSD-3-Clause
  */
 
-#ifndef __PLAT_ROCKCHIP_RK3399_DRIVER_SECURE_H__
-#define __PLAT_ROCKCHIP_RK3399_DRIVER_SECURE_H__
+#ifndef SECURE_H
+#define SECURE_H
 
 /**************************************************
  * sgrf reg, offset
@@ -102,4 +102,4 @@ void secure_sgrf_init(void);
 void secure_sgrf_ddr_rgn_init(void);
 __pmusramfunc void sram_secure_timer_init(void);
 
-#endif /* __PLAT_ROCKCHIP_RK3399_DRIVER_SECURE_H__ */
+#endif /* SECURE_H */