From c766adce6592352a6c22a048364e6ed688784514 Mon Sep 17 00:00:00 2001 From: Pritesh Raithatha Date: Mon, 18 Dec 2017 23:00:05 -0800 Subject: [PATCH] Tegra194: memctrl: enable mc coalescer This patch enable the Memory Controller's "Coalescer" feature to improve performance of memory transactions. Change-Id: I50ba0354116284f85d9e170c293ce77e9f3fb4d8 Signed-off-by: Pritesh Raithatha --- plat/nvidia/tegra/include/t194/tegra_mc_def.h | 3 +++ plat/nvidia/tegra/soc/t194/plat_memctrl.c | 5 ++++- 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/plat/nvidia/tegra/include/t194/tegra_mc_def.h b/plat/nvidia/tegra/include/t194/tegra_mc_def.h index 1433a2ea6..86ab85935 100644 --- a/plat/nvidia/tegra/include/t194/tegra_mc_def.h +++ b/plat/nvidia/tegra/include/t194/tegra_mc_def.h @@ -530,6 +530,9 @@ #define MC_CLIENT_HOTRESET_CTRL2_PCIE4A_FLUSH_ENB (1U << 25) #define MC_CLIENT_HOTRESET_STATUS2 0x1898U +#define MC_COALESCE_CTRL 0x2930U +#define MC_COALESCE_CTRL_COALESCER_ENABLE (1U << 31) + /******************************************************************************* * Tegra TSA Controller constants ******************************************************************************/ diff --git a/plat/nvidia/tegra/soc/t194/plat_memctrl.c b/plat/nvidia/tegra/soc/t194/plat_memctrl.c index 54dbe7cdb..a59cd11ae 100644 --- a/plat/nvidia/tegra/soc/t194/plat_memctrl.c +++ b/plat/nvidia/tegra/soc/t194/plat_memctrl.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -617,6 +617,9 @@ static void tegra194_memctrl_reconfig_mss_clients(void) wdata_2 = MC_CLIENT_HOTRESET_CTRL2_RESET_VAL; tegra_mc_write_32(MC_CLIENT_HOTRESET_CTRL2, wdata_2); + + reg_val = MC_COALESCE_CTRL_COALESCER_ENABLE; + tegra_mc_write_32(MC_COALESCE_CTRL, reg_val); } /******************************************************************************* -- GitLab