Commit c98db6c6 authored by Andrew F. Davis's avatar Andrew F. Davis
Browse files

PSCI: Update comment on MMU disablement



The MMU is not disabled in this path, update the comment to
reflect this. Also clarify that both paths call prepare_cpu_pwr_dwn(),
but the second path does stack cache maintenance.
Signed-off-by: default avatarAndrew F. Davis <afd@ti.com>
parent f7a18268
...@@ -948,21 +948,18 @@ void psci_do_pwrdown_sequence(unsigned int power_level) ...@@ -948,21 +948,18 @@ void psci_do_pwrdown_sequence(unsigned int power_level)
/* /*
* With hardware-assisted coherency, the CPU drivers only initiate the * With hardware-assisted coherency, the CPU drivers only initiate the
* power down sequence, without performing cache-maintenance operations * power down sequence, without performing cache-maintenance operations
* in software. Data caches and MMU remain enabled both before and after * in software. Data caches enabled both before and after this call.
* this call.
*/ */
prepare_cpu_pwr_dwn(power_level); prepare_cpu_pwr_dwn(power_level);
#else #else
/* /*
* Without hardware-assisted coherency, the CPU drivers disable data * Without hardware-assisted coherency, the CPU drivers disable data
* caches and MMU, then perform cache-maintenance operations in * caches, then perform cache-maintenance operations in software.
* software.
* *
* We ought to call prepare_cpu_pwr_dwn() to initiate power down * This also calls prepare_cpu_pwr_dwn() to initiate power down
* sequence. We currently have data caches and MMU enabled, but the * sequence, but that function will return with data caches disabled.
* function will return with data caches and MMU disabled. We must * We must ensure that the stack memory is flushed out to memory before
* ensure that the stack memory is flushed out to memory before we start * we start popping from it again.
* popping from it again.
*/ */
psci_do_pwrdown_cache_maintenance(power_level); psci_do_pwrdown_cache_maintenance(power_level);
#endif #endif
......
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