zynqmp: pm_service: Support multiple SDIO modes

Existing database allows to set only single mode for SDIO.
SDIO can have different groups (8 bit, 4 bit and 1 bit).
As there is only single SDIO group in each pin, it is not
 possible to use different mode groups for SDIO.

Extend database in generic way to allow multiuple function
groups in single pin. Add different SDIO groups to pins and
create separate functions for each modes.
Signed-off-by: Rajan Vaja <rajanv@xilinx.com>

plat/xilinx/zynqmp/pm_service/pm_api_pinctrl.h

@@ -228,8 +228,14 @@ enum pinctrl_group_ids {
 	PINCTRL_GRP_SPI1_5_SS1,
 	PINCTRL_GRP_SPI1_5_SS2,
 	PINCTRL_GRP_SDIO0_0,
+	PINCTRL_GRP_SDIO0_1,
+	PINCTRL_GRP_SDIO0_2,
 	PINCTRL_GRP_SDIO0_4BIT_0_0,
 	PINCTRL_GRP_SDIO0_4BIT_0_1,
+	PINCTRL_GRP_SDIO0_4BIT_1_0,
+	PINCTRL_GRP_SDIO0_4BIT_1_1,
+	PINCTRL_GRP_SDIO0_4BIT_2_0,
+	PINCTRL_GRP_SDIO0_4BIT_2_1,
 	PINCTRL_GRP_SDIO0_1BIT_0_0,
 	PINCTRL_GRP_SDIO0_1BIT_0_1,
 	PINCTRL_GRP_SDIO0_1BIT_0_2,
@@ -238,12 +244,6 @@ enum pinctrl_group_ids {
 	PINCTRL_GRP_SDIO0_1BIT_0_5,
 	PINCTRL_GRP_SDIO0_1BIT_0_6,
 	PINCTRL_GRP_SDIO0_1BIT_0_7,
-	PINCTRL_GRP_SDIO0_0_PC,
-	PINCTRL_GRP_SDIO0_0_CD,
-	PINCTRL_GRP_SDIO0_0_WP,
-	PINCTRL_GRP_SDIO0_1,
-	PINCTRL_GRP_SDIO0_4BIT_1_0,
-	PINCTRL_GRP_SDIO0_4BIT_1_1,
 	PINCTRL_GRP_SDIO0_1BIT_1_0,
 	PINCTRL_GRP_SDIO0_1BIT_1_1,
 	PINCTRL_GRP_SDIO0_1BIT_1_2,
@@ -252,12 +252,6 @@ enum pinctrl_group_ids {
 	PINCTRL_GRP_SDIO0_1BIT_1_5,
 	PINCTRL_GRP_SDIO0_1BIT_1_6,
 	PINCTRL_GRP_SDIO0_1BIT_1_7,
-	PINCTRL_GRP_SDIO0_1_PC,
-	PINCTRL_GRP_SDIO0_1_CD,
-	PINCTRL_GRP_SDIO0_1_WP,
-	PINCTRL_GRP_SDIO0_2,
-	PINCTRL_GRP_SDIO0_4BIT_2_0,
-	PINCTRL_GRP_SDIO0_4BIT_2_1,
 	PINCTRL_GRP_SDIO0_1BIT_2_0,
 	PINCTRL_GRP_SDIO0_1BIT_2_1,
 	PINCTRL_GRP_SDIO0_1BIT_2_2,
@@ -266,12 +260,19 @@ enum pinctrl_group_ids {
 	PINCTRL_GRP_SDIO0_1BIT_2_5,
 	PINCTRL_GRP_SDIO0_1BIT_2_6,
 	PINCTRL_GRP_SDIO0_1BIT_2_7,
+	PINCTRL_GRP_SDIO0_0_PC,
+	PINCTRL_GRP_SDIO0_0_CD,
+	PINCTRL_GRP_SDIO0_0_WP,
+	PINCTRL_GRP_SDIO0_1_PC,
+	PINCTRL_GRP_SDIO0_1_CD,
+	PINCTRL_GRP_SDIO0_1_WP,
 	PINCTRL_GRP_SDIO0_2_PC,
 	PINCTRL_GRP_SDIO0_2_CD,
 	PINCTRL_GRP_SDIO0_2_WP,
 	PINCTRL_GRP_SDIO1_0,
 	PINCTRL_GRP_SDIO1_4BIT_0_0,
 	PINCTRL_GRP_SDIO1_4BIT_0_1,
+	PINCTRL_GRP_SDIO1_4BIT_1_0,
 	PINCTRL_GRP_SDIO1_1BIT_0_0,
 	PINCTRL_GRP_SDIO1_1BIT_0_1,
 	PINCTRL_GRP_SDIO1_1BIT_0_2,
@@ -280,14 +281,13 @@ enum pinctrl_group_ids {
 	PINCTRL_GRP_SDIO1_1BIT_0_5,
 	PINCTRL_GRP_SDIO1_1BIT_0_6,
 	PINCTRL_GRP_SDIO1_1BIT_0_7,
-	PINCTRL_GRP_SDIO1_0_PC,
-	PINCTRL_GRP_SDIO1_0_CD,
-	PINCTRL_GRP_SDIO1_0_WP,
-	PINCTRL_GRP_SDIO1_4BIT_1_0,
 	PINCTRL_GRP_SDIO1_1BIT_1_0,
 	PINCTRL_GRP_SDIO1_1BIT_1_1,
 	PINCTRL_GRP_SDIO1_1BIT_1_2,
 	PINCTRL_GRP_SDIO1_1BIT_1_3,
+	PINCTRL_GRP_SDIO1_0_PC,
+	PINCTRL_GRP_SDIO1_0_CD,
+	PINCTRL_GRP_SDIO1_0_WP,
 	PINCTRL_GRP_SDIO1_1_PC,
 	PINCTRL_GRP_SDIO1_1_CD,
 	PINCTRL_GRP_SDIO1_1_WP,