diff --git a/plat/fvp/aarch64/fvp_common.c b/plat/fvp/aarch64/fvp_common.c
index 55c2cbbd3aab6e5442a081618bbc6c6d0277616a..fcda2a87820802d41c436b7f8a26620fb9ec6e1c 100644
--- a/plat/fvp/aarch64/fvp_common.c
+++ b/plat/fvp/aarch64/fvp_common.c
@@ -115,6 +115,9 @@ const mmap_region_t fvp_mmap[] = {
 };
 #endif
 
+CASSERT((sizeof(fvp_mmap)/sizeof(fvp_mmap[0])) + FVP_BL_REGIONS \
+		<= MAX_MMAP_REGIONS, assert_max_mmap_regions);
+
 /* Array of secure interrupts to be configured by the gic driver */
 const unsigned int irq_sec_array[] = {
 	IRQ_TZ_WDOG,
diff --git a/plat/fvp/fvp_def.h b/plat/fvp/fvp_def.h
index d1d9adb60d0e7b1d67ba3eea887d00daf0ee047e..e3442fce79ac057e7983c6669f4676eb5c93ba32 100644
--- a/plat/fvp/fvp_def.h
+++ b/plat/fvp/fvp_def.h
@@ -150,6 +150,33 @@
 #define FUNC_SHUTDOWN		0x08
 #define FUNC_REBOOT		0x09
 
+/*
+ * The number of regions like RO(code), coherent and data required by
+ * different BL stages which need to be mapped in the MMU.
+ */
+#if USE_COHERENT_MEM
+#define FVP_BL_REGIONS		3
+#else
+#define FVP_BL_REGIONS		2
+#endif
+
+/*
+ * The FVP_MAX_MMAP_REGIONS depend on the number of entries in fvp_mmap[]
+ * defined for each BL stage in fvp_common.c.
+ */
+#if IMAGE_BL1
+#define FVP_MMAP_ENTRIES		5
+#endif
+#if IMAGE_BL2
+#define FVP_MMAP_ENTRIES		7
+#endif
+#if IMAGE_BL31
+#define FVP_MMAP_ENTRIES		4
+#endif
+#if IMAGE_BL32
+#define FVP_MMAP_ENTRIES		3
+#endif
+
 /* Load address of BL33 in the FVP port */
 #define NS_IMAGE_OFFSET		(DRAM1_BASE + 0x8000000) /* DRAM + 128MB */
 
diff --git a/plat/fvp/include/platform_def.h b/plat/fvp/include/platform_def.h
index 326ba9d981a4f5f6b127b3cc1b7d7cd7c6418ec8..7cc9e90a0f6a1ff1b3ebeefff15c11d56c280b06 100644
--- a/plat/fvp/include/platform_def.h
+++ b/plat/fvp/include/platform_def.h
@@ -208,7 +208,7 @@
 # endif
 #endif
 
-#define MAX_MMAP_REGIONS		16
+#define MAX_MMAP_REGIONS		(FVP_MMAP_ENTRIES + FVP_BL_REGIONS)
 
 /*******************************************************************************
  * Declarations and constants to access the mailboxes safely. Each mailbox is
diff --git a/plat/juno/aarch64/juno_common.c b/plat/juno/aarch64/juno_common.c
index 7ad40d0da9f64be3b38436a04802a4d25e14097f..6ea0b155895b0fa6af25e9c99a7dbe428bcfe8d3 100644
--- a/plat/juno/aarch64/juno_common.c
+++ b/plat/juno/aarch64/juno_common.c
@@ -114,6 +114,9 @@ static const mmap_region_t juno_mmap[] = {
 };
 #endif
 
+CASSERT((sizeof(juno_mmap)/sizeof(juno_mmap[0])) + JUNO_BL_REGIONS \
+		<= MAX_MMAP_REGIONS, assert_max_mmap_regions);
+
 /* Array of secure interrupts to be configured by the gic driver */
 const unsigned int irq_sec_array[] = {
 	IRQ_MHU,
diff --git a/plat/juno/include/platform_def.h b/plat/juno/include/platform_def.h
index 1071d120538ec0f3088a6a95afc64351fc2434b0..be1fb2796a0956f837bb89d9b35fdd5cebe885d6 100644
--- a/plat/juno/include/platform_def.h
+++ b/plat/juno/include/platform_def.h
@@ -183,7 +183,7 @@
 # define MAX_XLAT_TABLES		3
 #endif
 
-#define MAX_MMAP_REGIONS		16
+#define MAX_MMAP_REGIONS		(JUNO_MMAP_ENTRIES + JUNO_BL_REGIONS)
 
 /*******************************************************************************
  * ID of the secure physical generic timer interrupt used by the TSP
diff --git a/plat/juno/juno_def.h b/plat/juno/juno_def.h
index 8a85aecdeecf1b9b88cc372a1aff414218332f63..84ceabd51bd6e0840cedb65fae3e1a5e1be60a37 100644
--- a/plat/juno/juno_def.h
+++ b/plat/juno/juno_def.h
@@ -140,6 +140,33 @@
 #define SYS_LED_EL_SHIFT		0x1
 #define SYS_LED_EC_SHIFT		0x3
 
+/*
+ * The number of regions like RO(code), coherent and data required by
+ * different BL stages which need to be mapped in the MMU.
+ */
+#if USE_COHERENT_MEM
+#define JUNO_BL_REGIONS		3
+#else
+#define JUNO_BL_REGIONS		2
+#endif
+
+/*
+ * The JUNO_MAX_MMAP_REGIONS depend on the number of entries in juno_mmap[]
+ * defined for each BL stage in juno_common.c.
+ */
+#if IMAGE_BL1
+#define JUNO_MMAP_ENTRIES		6
+#endif
+#if IMAGE_BL2
+#define JUNO_MMAP_ENTRIES		8
+#endif
+#if IMAGE_BL31
+#define JUNO_MMAP_ENTRIES		5
+#endif
+#if IMAGE_BL32
+#define JUNO_MMAP_ENTRIES		4
+#endif
+
 /*******************************************************************************
  * GIC-400 & interrupt handling related constants
  ******************************************************************************/