Commit ce4ca1a8 authored by Manish V Badarkhe's avatar Manish V Badarkhe
Browse files

plat/arm: Increase size of firmware configuration area



Increased the size of firmware configuration area to accommodate
all configs.

Updated maximum size of following bootloaders due to increase
in firmware configs size and addition of the code in the BL2.

1. Increased maximum size of BL2 for Juno platform in no
   optimisation case.
2. Reduced maximum size of BL31 for fvp and Juno platform.
3. Reduced maximum size of BL32 for Juno platform.

Change-Id: Ifba0564df0d1fe86175bed9fae87fdcf013b1831
Signed-off-by: default avatarManish V Badarkhe <Manish.Badarkhe@arm.com>
parent 82869675
...@@ -350,7 +350,7 @@ ...@@ -350,7 +350,7 @@
* and limit. Leave enough space of BL2 meminfo. * and limit. Leave enough space of BL2 meminfo.
*/ */
#define ARM_FW_CONFIG_BASE (ARM_BL_RAM_BASE + sizeof(meminfo_t)) #define ARM_FW_CONFIG_BASE (ARM_BL_RAM_BASE + sizeof(meminfo_t))
#define ARM_FW_CONFIG_LIMIT (ARM_BL_RAM_BASE + (PAGE_SIZE / 2U)) #define ARM_FW_CONFIG_LIMIT (ARM_BL_RAM_BASE + PAGE_SIZE)
/* /*
* Boot parameters passed from BL2 to BL31/BL32 are stored here * Boot parameters passed from BL2 to BL31/BL32 are stored here
...@@ -363,7 +363,7 @@ ...@@ -363,7 +363,7 @@
* Define limit of firmware configuration memory: * Define limit of firmware configuration memory:
* ARM_FW_CONFIG + ARM_BL2_MEM_DESC memory * ARM_FW_CONFIG + ARM_BL2_MEM_DESC memory
*/ */
#define ARM_FW_CONFIGS_LIMIT (ARM_BL_RAM_BASE + PAGE_SIZE) #define ARM_FW_CONFIGS_LIMIT (ARM_BL_RAM_BASE + (PAGE_SIZE * 2))
/******************************************************************************* /*******************************************************************************
* BL1 specific defines. * BL1 specific defines.
......
...@@ -133,7 +133,7 @@ ...@@ -133,7 +133,7 @@
* calculated using the current BL31 PROGBITS debug size plus the sizes of * calculated using the current BL31 PROGBITS debug size plus the sizes of
* BL2 and BL1-RW * BL2 and BL1-RW
*/ */
#define PLAT_ARM_MAX_BL31_SIZE UL(0x3E000) #define PLAT_ARM_MAX_BL31_SIZE UL(0x3D000)
#endif /* RESET_TO_BL31 */ #endif /* RESET_TO_BL31 */
#ifndef __aarch64__ #ifndef __aarch64__
......
...@@ -139,7 +139,7 @@ ...@@ -139,7 +139,7 @@
# define PLAT_ARM_MAX_BL2_SIZE (UL(0x1D000) - JUNO_BL2_ROMLIB_OPTIMIZATION) # define PLAT_ARM_MAX_BL2_SIZE (UL(0x1D000) - JUNO_BL2_ROMLIB_OPTIMIZATION)
#endif #endif
#else #else
# define PLAT_ARM_MAX_BL2_SIZE (UL(0x11000) - JUNO_BL2_ROMLIB_OPTIMIZATION) # define PLAT_ARM_MAX_BL2_SIZE (UL(0x13000) - JUNO_BL2_ROMLIB_OPTIMIZATION)
#endif #endif
/* /*
...@@ -148,7 +148,7 @@ ...@@ -148,7 +148,7 @@
* BL2 and BL1-RW. SCP_BL2 image is loaded into the space BL31 -> BL2_BASE. * BL2 and BL1-RW. SCP_BL2 image is loaded into the space BL31 -> BL2_BASE.
* Hence the BL31 PROGBITS size should be >= PLAT_CSS_MAX_SCP_BL2_SIZE. * Hence the BL31 PROGBITS size should be >= PLAT_CSS_MAX_SCP_BL2_SIZE.
*/ */
#define PLAT_ARM_MAX_BL31_SIZE UL(0x3E000) #define PLAT_ARM_MAX_BL31_SIZE UL(0x3D000)
#if JUNO_AARCH32_EL3_RUNTIME #if JUNO_AARCH32_EL3_RUNTIME
/* /*
...@@ -157,7 +157,7 @@ ...@@ -157,7 +157,7 @@
* BL2 and BL1-RW. SCP_BL2 image is loaded into the space BL32 -> BL2_BASE. * BL2 and BL1-RW. SCP_BL2 image is loaded into the space BL32 -> BL2_BASE.
* Hence the BL32 PROGBITS size should be >= PLAT_CSS_MAX_SCP_BL2_SIZE. * Hence the BL32 PROGBITS size should be >= PLAT_CSS_MAX_SCP_BL2_SIZE.
*/ */
#define PLAT_ARM_MAX_BL32_SIZE UL(0x3E000) #define PLAT_ARM_MAX_BL32_SIZE UL(0x3D000)
#endif #endif
/* /*
......
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