From cfe19f85c9f0e8634e841e584c3b8772cdd5a41e Mon Sep 17 00:00:00 2001
From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Date: Fri, 15 Jun 2018 15:25:42 +0530
Subject: [PATCH] synquacer: Retrieve DRAM info from SCP firmware
Retrieve DRAM info from SCP firmware using SCPI driver. Board supports
multiple DRAM slots so its required to fetch DRAM info from SCP firmware
and pass this info to UEFI via non-secure SRAM.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
---
.../synquacer/drivers/scpi/sq_scpi.c | 46 +++++++++++++++++++
.../synquacer/include/platform_def.h | 2 +
plat/socionext/synquacer/include/sq_common.h | 13 ++++++
plat/socionext/synquacer/sq_bl31_setup.c | 3 ++
4 files changed, 64 insertions(+)
diff --git a/plat/socionext/synquacer/drivers/scpi/sq_scpi.c b/plat/socionext/synquacer/drivers/scpi/sq_scpi.c
index a6924e2e2..170b7e184 100644
--- a/plat/socionext/synquacer/drivers/scpi/sq_scpi.c
+++ b/plat/socionext/synquacer/drivers/scpi/sq_scpi.c
@@ -168,3 +168,49 @@ uint32_t scpi_sys_power_state(scpi_system_state_t system_state)
return response.status;
}
+
+uint32_t scpi_get_draminfo(struct draminfo *info)
+{
+ scpi_cmd_t *cmd;
+ struct {
+ scpi_cmd_t cmd;
+ struct draminfo info;
+ } response;
+ uint32_t mhu_status;
+
+ scpi_secure_message_start();
+
+ /* Populate the command header */
+ cmd = SCPI_CMD_HEADER_AP_TO_SCP;
+ cmd->id = SCPI_CMD_GET_DRAMINFO;
+ cmd->set = SCPI_SET_EXTENDED;
+ cmd->sender = 0;
+ cmd->size = 0;
+
+ scpi_secure_message_send(0);
+
+ mhu_status = mhu_secure_message_wait();
+
+ /* Expect an SCPI message, reject any other protocol */
+ if (mhu_status != (1 << SCPI_MHU_SLOT_ID)) {
+ ERROR("MHU: Unexpected protocol (MHU status: 0x%x)\n",
+ mhu_status);
+ panic();
+ }
+
+ /*
+ * Ensure that any read to the SCPI payload area is done after reading
+ * the MHU register. If these 2 reads were reordered then the CPU would
+ * read invalid payload data
+ */
+ dmbld();
+
+ memcpy(&response, (void *)SCPI_SHARED_MEM_SCP_TO_AP, sizeof(response));
+
+ scpi_secure_message_end();
+
+ if (response.cmd.status == SCP_OK)
+ *info = response.info;
+
+ return response.cmd.status;
+}
diff --git a/plat/socionext/synquacer/include/platform_def.h b/plat/socionext/synquacer/include/platform_def.h
index f9bc4022c..e339d855f 100644
--- a/plat/socionext/synquacer/include/platform_def.h
+++ b/plat/socionext/synquacer/include/platform_def.h
@@ -54,6 +54,8 @@
#define SQ_SYS_TIMCTL_BASE 0x2a810000
#define PLAT_SQ_NSTIMER_FRAME_ID 0
+#define DRAMINFO_BASE 0x2E00FFC0
+
#define PLAT_SQ_MHU_BASE 0x45000000
#define PLAT_SQ_SCP_COM_SHARED_MEM_BASE 0x45400000
diff --git a/plat/socionext/synquacer/include/sq_common.h b/plat/socionext/synquacer/include/sq_common.h
index 8839a051d..58b1e24ec 100644
--- a/plat/socionext/synquacer/include/sq_common.h
+++ b/plat/socionext/synquacer/include/sq_common.h
@@ -10,6 +10,19 @@
#include <sys/types.h>
#include <xlat_tables_v2.h>
+struct draminfo {
+ uint32_t num_regions;
+ uint32_t reserved;
+ uint64_t base1;
+ uint64_t size1;
+ uint64_t base2;
+ uint64_t size2;
+ uint64_t base3;
+ uint64_t size3;
+};
+
+uint32_t scpi_get_draminfo(struct draminfo *info);
+
void plat_sq_pwrc_setup(void);
void plat_sq_interconnect_init(void);
diff --git a/plat/socionext/synquacer/sq_bl31_setup.c b/plat/socionext/synquacer/sq_bl31_setup.c
index 4d7c85129..461c8dece 100644
--- a/plat/socionext/synquacer/sq_bl31_setup.c
+++ b/plat/socionext/synquacer/sq_bl31_setup.c
@@ -132,6 +132,9 @@ void bl31_platform_setup(void)
void bl31_plat_runtime_setup(void)
{
+ struct draminfo *di = (struct draminfo *)(unsigned long)DRAMINFO_BASE;
+
+ scpi_get_draminfo(di);
}
void bl31_plat_arch_setup(void)
--
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