From d1bc71455bfb7a4bf1dc9c8bcd06cc58663fadbf Mon Sep 17 00:00:00 2001
From: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Date: Fri, 5 Oct 2018 20:42:42 +0100
Subject: [PATCH] gxbb: Implement PSCI_CPU_OFF
This works fine for CPU1-3, but it fails for CPU0, where it is simply
ignored and leaves CPU0 in a WFI loop.
Change-Id: I7d73683fdd894f2021d6a5bc2cce6cd03e18e633
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
---
plat/meson/gxbb/gxbb_pm.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/plat/meson/gxbb/gxbb_pm.c b/plat/meson/gxbb/gxbb_pm.c
index 6a13159a8..632a53f46 100644
--- a/plat/meson/gxbb/gxbb_pm.c
+++ b/plat/meson/gxbb/gxbb_pm.c
@@ -101,12 +101,28 @@ static void gxbb_pwr_domain_on_finish(const psci_power_state_t *target_state)
gicv2_cpuif_enable();
}
+static void gxbb_pwr_domain_off(const psci_power_state_t *target_state)
+{
+ u_register_t mpidr = read_mpidr_el1();
+ unsigned int core = plat_gxbb_calc_core_pos(mpidr);
+ uintptr_t addr = GXBB_PSCI_MAILBOX_BASE + 8 + (core << 4);
+
+ mmio_write_32(addr, 0xFFFFFFFF);
+ flush_dcache_range(addr, sizeof(uint32_t));
+
+ gicv2_cpuif_disable();
+
+ scpi_set_css_power_state(mpidr,
+ SCPI_POWER_OFF, SCPI_POWER_ON, SCPI_POWER_ON);
+}
+
/*******************************************************************************
* Platform handlers and setup function.
******************************************************************************/
static const plat_psci_ops_t gxbb_ops = {
.pwr_domain_on = gxbb_pwr_domain_on,
.pwr_domain_on_finish = gxbb_pwr_domain_on_finish,
+ .pwr_domain_off = gxbb_pwr_domain_off,
.system_off = gxbb_system_off,
.system_reset = gxbb_system_reset,
};
--
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