Commit d2737fe1 authored by Mark Dykes's avatar Mark Dykes Committed by TrustedFirmware Code Review
Browse files

Merge changes from topic "mp/enhanced_pal_hw" into integration

* changes:
  plat/arm/fvp: populate pwr domain descriptor dynamically
  fconf: Extract topology node properties from HW_CONFIG dtb
  fconf: necessary modifications to support fconf in BL31 & SP_MIN
  fconf: enhancements to firmware configuration framework
parents 8fd41bb9 6138ffbc
/*
* Copyright (c) 2020, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef FCONF_HW_CONFIG_GETTER_H
#define FCONF_HW_CONFIG_GETTER_H
#include <lib/fconf/fconf.h>
/* Hardware Config related getter */
#define hw_config__gicv3_config_getter(prop) gicv3_config.prop
#define hw_config__topology_getter(prop) soc_topology.prop
struct gicv3_config_t {
void *gicd_base;
void *gicr_base;
};
struct hw_topology_t {
uint32_t plat_cluster_count;
uint32_t cluster_cpu_count;
uint32_t plat_cpu_count;
uint32_t plat_max_pwr_level;
};
int fconf_populate_gicv3_config(uintptr_t config);
int fconf_populate_topology(uintptr_t config);
extern struct gicv3_config_t gicv3_config;
extern struct hw_topology_t soc_topology;
#endif /* FCONF_HW_CONFIG_GETTER_H */
...@@ -63,12 +63,12 @@ ...@@ -63,12 +63,12 @@
*/ */
#if defined(IMAGE_BL31) #if defined(IMAGE_BL31)
# if SPM_MM # if SPM_MM
# define PLAT_ARM_MMAP_ENTRIES 9 # define PLAT_ARM_MMAP_ENTRIES 10
# define MAX_XLAT_TABLES 9 # define MAX_XLAT_TABLES 9
# define PLAT_SP_IMAGE_MMAP_REGIONS 30 # define PLAT_SP_IMAGE_MMAP_REGIONS 30
# define PLAT_SP_IMAGE_MAX_XLAT_TABLES 10 # define PLAT_SP_IMAGE_MAX_XLAT_TABLES 10
# else # else
# define PLAT_ARM_MMAP_ENTRIES 8 # define PLAT_ARM_MMAP_ENTRIES 9
# if USE_DEBUGFS # if USE_DEBUGFS
# define MAX_XLAT_TABLES 6 # define MAX_XLAT_TABLES 6
# else # else
...@@ -76,7 +76,7 @@ ...@@ -76,7 +76,7 @@
# endif # endif
# endif # endif
#elif defined(IMAGE_BL32) #elif defined(IMAGE_BL32)
# define PLAT_ARM_MMAP_ENTRIES 8 # define PLAT_ARM_MMAP_ENTRIES 9
# define MAX_XLAT_TABLES 5 # define MAX_XLAT_TABLES 5
#elif !USE_ROMLIB #elif !USE_ROMLIB
# define PLAT_ARM_MMAP_ENTRIES 11 # define PLAT_ARM_MMAP_ENTRIES 11
......
...@@ -22,6 +22,8 @@ fdt fdt_node_offset_by_compatible ...@@ -22,6 +22,8 @@ fdt fdt_node_offset_by_compatible
fdt fdt_setprop_inplace_namelen_partial fdt fdt_setprop_inplace_namelen_partial
fdt fdt_first_subnode fdt fdt_first_subnode
fdt fdt_next_subnode fdt fdt_next_subnode
fdt fdt_path_offset
fdt fdt_subnode_offset
mbedtls mbedtls_asn1_get_alg mbedtls mbedtls_asn1_get_alg
mbedtls mbedtls_asn1_get_alg_null mbedtls mbedtls_asn1_get_alg_null
mbedtls mbedtls_asn1_get_bitstring_null mbedtls mbedtls_asn1_get_bitstring_null
......
...@@ -204,6 +204,12 @@ BL31_SOURCES += drivers/arm/fvp/fvp_pwrc.c \ ...@@ -204,6 +204,12 @@ BL31_SOURCES += drivers/arm/fvp/fvp_pwrc.c \
${FVP_INTERCONNECT_SOURCES} \ ${FVP_INTERCONNECT_SOURCES} \
${FVP_SECURITY_SOURCES} ${FVP_SECURITY_SOURCES}
# Support for fconf in BL31
# Added separately from the above list for better readability
BL31_SOURCES += common/fdt_wrappers.c \
lib/fconf/fconf.c \
plat/arm/board/fvp/fconf/fconf_hw_config_getter.c
ifeq (${FVP_USE_SP804_TIMER},1) ifeq (${FVP_USE_SP804_TIMER},1)
BL31_SOURCES += drivers/arm/sp804/sp804_delay_timer.c BL31_SOURCES += drivers/arm/sp804/sp804_delay_timer.c
else else
......
/* /*
* Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2016-2020, ARM Limited and Contributors. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
#include <assert.h>
#include <bl32/sp_min/platform_sp_min.h>
#include <common/debug.h>
#include <lib/fconf/fconf.h>
#include <plat/arm/common/plat_arm.h> #include <plat/arm/common/plat_arm.h>
#include "../fvp_private.h" #include "../fvp_private.h"
uintptr_t hw_config_dtb;
void plat_arm_sp_min_early_platform_setup(u_register_t arg0, u_register_t arg1, void plat_arm_sp_min_early_platform_setup(u_register_t arg0, u_register_t arg1,
u_register_t arg2, u_register_t arg3) u_register_t arg2, u_register_t arg3)
{ {
...@@ -30,4 +37,24 @@ void plat_arm_sp_min_early_platform_setup(u_register_t arg0, u_register_t arg1, ...@@ -30,4 +37,24 @@ void plat_arm_sp_min_early_platform_setup(u_register_t arg0, u_register_t arg1,
* FVP PSCI code will enable coherency for other clusters. * FVP PSCI code will enable coherency for other clusters.
*/ */
fvp_interconnect_enable(); fvp_interconnect_enable();
hw_config_dtb = arg2;
}
void sp_min_plat_arch_setup(void)
{
arm_sp_min_plat_arch_setup();
/*
* For RESET_TO_SP_MIN systems, SP_MIN(BL32) is the first bootloader
* to run. So there is no BL2 to load the HW_CONFIG dtb into memory
* before control is passed to SP_MIN.
* Also, BL2 skips loading HW_CONFIG dtb for BL2_AT_EL3 builds.
*/
#if !RESET_TO_SP_MIN && !BL2_AT_EL3
assert(hw_config_dtb != 0U);
INFO("SP_MIN FCONF: HW_CONFIG address = %p\n", (void *)hw_config_dtb);
fconf_populate("HW_CONFIG", hw_config_dtb);
#endif
} }
# #
# Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved. # Copyright (c) 2016-2020, ARM Limited and Contributors. All rights reserved.
# #
# SPDX-License-Identifier: BSD-3-Clause # SPDX-License-Identifier: BSD-3-Clause
# #
...@@ -18,4 +18,10 @@ BL32_SOURCES += drivers/arm/fvp/fvp_pwrc.c \ ...@@ -18,4 +18,10 @@ BL32_SOURCES += drivers/arm/fvp/fvp_pwrc.c \
${FVP_INTERCONNECT_SOURCES} \ ${FVP_INTERCONNECT_SOURCES} \
${FVP_SECURITY_SOURCES} ${FVP_SECURITY_SOURCES}
# Support for fconf in SP_MIN(BL32)
# Added separately from the above list for better readability
BL32_SOURCES += common/fdt_wrappers.c \
lib/fconf/fconf.c \
plat/arm/board/fvp/fconf/fconf_hw_config_getter.c
include plat/arm/common/sp_min/arm_sp_min.mk include plat/arm/common/sp_min/arm_sp_min.mk
...@@ -61,7 +61,7 @@ void arm_bl2_early_platform_setup(uintptr_t tb_fw_config, ...@@ -61,7 +61,7 @@ void arm_bl2_early_platform_setup(uintptr_t tb_fw_config,
/* Fill the properties struct with the info from the config dtb */ /* Fill the properties struct with the info from the config dtb */
if (tb_fw_config != 0U) { if (tb_fw_config != 0U) {
fconf_populate(tb_fw_config); fconf_populate("TB_FW", tb_fw_config);
} }
/* Initialise the IO layer and register platform IO devices */ /* Initialise the IO layer and register platform IO devices */
......
...@@ -138,6 +138,6 @@ int fconf_populate_arm_io_policies(uintptr_t config) ...@@ -138,6 +138,6 @@ int fconf_populate_arm_io_policies(uintptr_t config)
return 0; return 0;
} }
FCONF_REGISTER_POPULATOR(arm_io, fconf_populate_arm_io_policies); FCONF_REGISTER_POPULATOR(TB_FW, arm_io, fconf_populate_arm_io_policies);
#endif /* IMAGE_BL2 */ #endif /* IMAGE_BL2 */
...@@ -102,6 +102,6 @@ int fconf_populate_arm_sp(uintptr_t config) ...@@ -102,6 +102,6 @@ int fconf_populate_arm_sp(uintptr_t config)
return 0; return 0;
} }
FCONF_REGISTER_POPULATOR(arm_sp, fconf_populate_arm_sp); FCONF_REGISTER_POPULATOR(TB_FW, arm_sp, fconf_populate_arm_sp);
#endif /* IMAGE_BL2 */ #endif /* IMAGE_BL2 */
...@@ -217,7 +217,7 @@ void sp_min_plat_runtime_setup(void) ...@@ -217,7 +217,7 @@ void sp_min_plat_runtime_setup(void)
* Perform the very early platform specific architectural setup here. At the * Perform the very early platform specific architectural setup here. At the
* moment this only initializes the MMU * moment this only initializes the MMU
******************************************************************************/ ******************************************************************************/
void sp_min_plat_arch_setup(void) void arm_sp_min_plat_arch_setup(void)
{ {
const mmap_region_t bl_regions[] = { const mmap_region_t bl_regions[] = {
MAP_BL_SP_MIN_TOTAL, MAP_BL_SP_MIN_TOTAL,
...@@ -232,3 +232,8 @@ void sp_min_plat_arch_setup(void) ...@@ -232,3 +232,8 @@ void sp_min_plat_arch_setup(void)
enable_mmu_svc_mon(0); enable_mmu_svc_mon(0);
} }
void sp_min_plat_arch_setup(void)
{
arm_sp_min_plat_arch_setup();
}
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