Commit d801a1d0 authored by Sandrine Bailleux's avatar Sandrine Bailleux Committed by Antonio Nino Diaz
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SPM: Treat SP xlat tables the same as others

The translation tables allocated for the Secure Partition do not need
to be treated as a special case. They can be put amongst the other
tables mapping BL31's general purpose memory. They will be mapped with
the same attributes as them, which is fine.

The explicit alignment constraint in BL31's linker script to pad the
last page of memory allocated to the Secure Partition's translation
tables is useless too, as page tables are per se pages, thus their
end address is naturally aligned on a page-boundary.

In fact, this patch does not change the existing behaviour. Since
patch 22282bb6

 ("SPM: Move all SP-related info to SP context
struct"), the secure_partition.c file has been renamed into sp_xlat.c
but the linker script has not been properly updated. As a result, the
SP translation tables are not specifically put at the start of the
xlat_table linker section, the __SP_IMAGE_XLAT_TABLES_START__/_END__
symbols have the same value, the size of the resulting mmap_region
covering these xlat tables is 0 and so it is ignored.

Change-Id: I4cf0a4cc090298811cca53fc9cee74df0f2b1512
Signed-off-by: default avatarSandrine Bailleux <sandrine.bailleux@arm.com>
parent a0b9bb79
...@@ -221,13 +221,6 @@ SECTIONS ...@@ -221,13 +221,6 @@ SECTIONS
* tables library. * tables library.
*/ */
xlat_table (NOLOAD) : { xlat_table (NOLOAD) : {
#if ENABLE_SPM
__SP_IMAGE_XLAT_TABLES_START__ = .;
*secure_partition*.o(xlat_table)
/* Make sure that the rest of the page is empty. */
. = NEXT(PAGE_SIZE);
__SP_IMAGE_XLAT_TABLES_END__ = .;
#endif
*(xlat_table) *(xlat_table)
} >RAM } >RAM
......
...@@ -245,13 +245,7 @@ ...@@ -245,13 +245,7 @@
* The number of regions like RO(code), coherent and data required by * The number of regions like RO(code), coherent and data required by
* different BL stages which need to be mapped in the MMU. * different BL stages which need to be mapped in the MMU.
*/ */
#if ENABLE_SPM && defined(IMAGE_BL31) #if USE_COHERENT_MEM
# if USE_COHERENT_MEM
# define ARM_BL_REGIONS 5
# else
# define ARM_BL_REGIONS 4
# endif
#elif USE_COHERENT_MEM
# define ARM_BL_REGIONS 4 # define ARM_BL_REGIONS 4
#else #else
# define ARM_BL_REGIONS 3 # define ARM_BL_REGIONS 3
......
...@@ -7,18 +7,9 @@ ...@@ -7,18 +7,9 @@
#ifndef __SECURE_PARTITION_H__ #ifndef __SECURE_PARTITION_H__
#define __SECURE_PARTITION_H__ #define __SECURE_PARTITION_H__
#include <bl_common.h>
#include <types.h> #include <types.h>
#include <utils_def.h> #include <utils_def.h>
/* Import linker symbols */
IMPORT_SYM(uintptr_t, __SP_IMAGE_XLAT_TABLES_START__, SP_IMAGE_XLAT_TABLES_START);
IMPORT_SYM(uintptr_t, __SP_IMAGE_XLAT_TABLES_END__, SP_IMAGE_XLAT_TABLES_END);
/* Definitions */
#define SP_IMAGE_XLAT_TABLES_SIZE \
(SP_IMAGE_XLAT_TABLES_END - SP_IMAGE_XLAT_TABLES_START)
/* /*
* Flags used by the secure_partition_mp_info structure to describe the * Flags used by the secure_partition_mp_info structure to describe the
* characteristics of a cpu. Only a single flag is defined at the moment to * characteristics of a cpu. Only a single flag is defined at the moment to
......
...@@ -81,14 +81,6 @@ void arm_setup_page_tables(uintptr_t total_base, ...@@ -81,14 +81,6 @@ void arm_setup_page_tables(uintptr_t total_base,
MT_DEVICE | MT_RW | MT_SECURE); MT_DEVICE | MT_RW | MT_SECURE);
#endif #endif
#if ENABLE_SPM && defined(IMAGE_BL31)
/* The address of the following region is calculated by the linker. */
mmap_add_region(SP_IMAGE_XLAT_TABLES_START,
SP_IMAGE_XLAT_TABLES_START,
SP_IMAGE_XLAT_TABLES_SIZE,
MT_MEMORY | MT_RW | MT_SECURE);
#endif
/* Now (re-)map the platform-specific memory regions */ /* Now (re-)map the platform-specific memory regions */
mmap_add(plat_arm_get_mmap()); mmap_add(plat_arm_get_mmap());
......
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