diff --git a/plat/rockchip/common/bl31_plat_setup.c b/plat/rockchip/common/bl31_plat_setup.c
index b04c08a4f920cb89db2b247e4d334130b95ede34..c4a03592ea87dc8daef1df5652ae185fe0df3b3c 100644
--- a/plat/rockchip/common/bl31_plat_setup.c
+++ b/plat/rockchip/common/bl31_plat_setup.c
@@ -14,7 +14,6 @@
 #include <drivers/console.h>
 #include <drivers/generic_delay_timer.h>
 #include <drivers/ti/uart/uart_16550.h>
-#include <lib/coreboot.h>
 #include <lib/mmio.h>
 #include <plat_private.h>
 #include <plat/common/platform.h>
@@ -62,16 +61,10 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
 
 	params_early_setup(arg1);
 
-#if COREBOOT
-	if (coreboot_serial.type)
-		console_16550_register(coreboot_serial.baseaddr,
-				       coreboot_serial.input_hertz,
-				       coreboot_serial.baud,
-				       &console);
-#else
-	console_16550_register(rockchip_get_uart_base(), PLAT_RK_UART_CLOCK,
-			       rockchip_get_uart_baudrate(), &console);
-#endif
+	if (rockchip_get_uart_base() != 0)
+		console_16550_register(rockchip_get_uart_base(),
+				       rockchip_get_uart_clock(),
+				       rockchip_get_uart_baudrate(), &console);
 
 	VERBOSE("bl31_setup\n");
 
diff --git a/plat/rockchip/common/include/plat_private.h b/plat/rockchip/common/include/plat_private.h
index f3303dbc78d29726bd9229d1e4f024acb5ea6074..98143b7f61425ba9d707e83fa051949ec039e91f 100644
--- a/plat/rockchip/common/include/plat_private.h
+++ b/plat/rockchip/common/include/plat_private.h
@@ -140,6 +140,7 @@ extern const mmap_region_t plat_rk_mmap[];
 
 uint32_t rockchip_get_uart_base(void);
 uint32_t rockchip_get_uart_baudrate(void);
+uint32_t rockchip_get_uart_clock(void);
 
 #endif /* __ASSEMBLY__ */
 
diff --git a/plat/rockchip/common/params_setup.c b/plat/rockchip/common/params_setup.c
index 9e8ef40cecab0dab82be84524b359193ccc3ec7f..8c2e5e911b168d6deadb5b60aa08c211cdfd4f7c 100644
--- a/plat/rockchip/common/params_setup.c
+++ b/plat/rockchip/common/params_setup.c
@@ -26,18 +26,6 @@ static struct bl_aux_gpio_info poweroff_gpio;
 static struct bl_aux_gpio_info suspend_gpio[10];
 uint32_t suspend_gpio_cnt;
 static struct bl_aux_rk_apio_info suspend_apio;
-static uint32_t rk_uart_base = PLAT_RK_UART_BASE;
-static uint32_t rk_uart_baudrate = PLAT_RK_UART_BAUDRATE;
-
-uint32_t rockchip_get_uart_base(void)
-{
-	return rk_uart_base;
-}
-
-uint32_t rockchip_get_uart_baudrate(void)
-{
-	return rk_uart_baudrate;
-}
 
 #if COREBOOT
 static int dt_process_fdt(u_register_t param_from_bl2)
@@ -45,6 +33,9 @@ static int dt_process_fdt(u_register_t param_from_bl2)
 	return -ENODEV;
 }
 #else
+static uint32_t rk_uart_base = PLAT_RK_UART_BASE;
+static uint32_t rk_uart_baudrate = PLAT_RK_UART_BAUDRATE;
+static uint32_t rk_uart_clock = PLAT_RK_UART_CLOCK;
 static uint8_t fdt_buffer[0x10000];
 
 void *plat_get_fdt(void)
@@ -154,6 +145,33 @@ static int dt_process_fdt(u_register_t param_from_bl2)
 }
 #endif
 
+uint32_t rockchip_get_uart_base(void)
+{
+#if COREBOOT
+	return coreboot_serial.baseaddr;
+#else
+	return rk_uart_base;
+#endif
+}
+
+uint32_t rockchip_get_uart_baudrate(void)
+{
+#if COREBOOT
+	return coreboot_serial.baud;
+#else
+	return rk_uart_baudrate;
+#endif
+}
+
+uint32_t rockchip_get_uart_clock(void)
+{
+#if COREBOOT
+	return coreboot_serial.input_hertz;
+#else
+	return rk_uart_clock;
+#endif
+}
+
 struct bl_aux_gpio_info *plat_get_rockchip_gpio_reset(void)
 {
 	return &rst_gpio;
diff --git a/plat/rockchip/common/sp_min_plat_setup.c b/plat/rockchip/common/sp_min_plat_setup.c
index 7638dac563469c83d214384547781f0a7ed7a60a..6d15075f2a848003fa6de64bf785d988a4c34e1a 100644
--- a/plat/rockchip/common/sp_min_plat_setup.c
+++ b/plat/rockchip/common/sp_min_plat_setup.c
@@ -15,7 +15,6 @@
 #include <drivers/console.h>
 #include <drivers/generic_delay_timer.h>
 #include <drivers/ti/uart/uart_16550.h>
-#include <lib/coreboot.h>
 #include <lib/mmio.h>
 #include <plat_private.h>
 #include <plat/common/platform.h>
@@ -57,16 +56,11 @@ void sp_min_early_platform_setup2(u_register_t arg0, u_register_t arg1,
 
 	params_early_setup(arg1);
 
-#if COREBOOT
-	if (coreboot_serial.type)
-		console_16550_register(coreboot_serial.baseaddr,
-				       coreboot_serial.input_hertz,
-				       coreboot_serial.baud,
-				       &console);
-#else
-	console_16550_register(rockchip_get_uart_base(), PLAT_RK_UART_CLOCK,
-			       rockchip_get_uart_baudrate(), &console);
-#endif
+	if (rockchip_get_uart_base() != 0)
+		console_16550_register(rockchip_get_uart_base(),
+				       rockchip_get_uart_clock(),
+				       rockchip_get_uart_baudrate(), &console);
+
 	VERBOSE("sp_min_setup\n");
 
 	bl31_params_parse_helper(arg0, NULL, &bl33_ep_info);