Commit e84ca571 authored by Madhukar Pappireddy's avatar Madhukar Pappireddy Committed by TrustedFirmware Code Review
Browse files

Merge "plat: xilinx: versal: Mark IPI calls secure/non-secure" into integration

parents 2e0e51f4 4697164a
......@@ -19,6 +19,9 @@
#define PAYLOAD_ARG_CNT 6U
#define PAYLOAD_ARG_SIZE 4U /* size in bytes */
#define NON_SECURE_FLAG 1U
#define SECURE_FLAG 0U
#define VERSAL_TZ_VERSION_MAJOR 1
#define VERSAL_TZ_VERSION_MINOR 0
#define VERSAL_TZ_VERSION ((VERSAL_TZ_VERSION_MAJOR << 16) | \
......
......@@ -33,7 +33,7 @@ static int versal_pwr_domain_on(u_register_t mpidr)
/* Send request to PMC to wake up selected ACPU core */
pm_req_wakeup(proc->node_id, (versal_sec_entry & 0xFFFFFFFF) | 0x1,
versal_sec_entry >> 32, 0);
versal_sec_entry >> 32, 0, SECURE_FLAG);
/* Clear power down request */
pm_client_wakeup(proc);
......@@ -67,7 +67,8 @@ static void versal_pwr_domain_suspend(const psci_power_state_t *target_state)
PM_STATE_SUSPEND_TO_RAM : PM_STATE_CPU_IDLE;
/* Send request to PMC to suspend this core */
pm_self_suspend(proc->node_id, MAX_LATENCY, state, versal_sec_entry);
pm_self_suspend(proc->node_id, MAX_LATENCY, state, versal_sec_entry,
SECURE_FLAG);
/* APU is to be turned off */
if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) {
......@@ -123,7 +124,7 @@ static void __dead2 versal_system_off(void)
{
/* Send the power down request to the PMC */
pm_system_shutdown(XPM_SHUTDOWN_TYPE_SHUTDOWN,
pm_get_shutdown_scope());
pm_get_shutdown_scope(), SECURE_FLAG);
while (1)
wfi();
......@@ -137,7 +138,7 @@ static void __dead2 versal_system_reset(void)
{
/* Send the system reset request to the PMC */
pm_system_shutdown(XPM_SHUTDOWN_TYPE_RESET,
pm_get_shutdown_scope());
pm_get_shutdown_scope(), SECURE_FLAG);
while (1)
wfi();
......@@ -168,7 +169,8 @@ static void versal_pwr_domain_off(const psci_power_state_t *target_state)
* invoking CPU_on function, during which resume address will
* be set.
*/
pm_self_suspend(proc->node_id, MAX_LATENCY, PM_STATE_CPU_IDLE, 0);
pm_self_suspend(proc->node_id, MAX_LATENCY, PM_STATE_CPU_IDLE, 0,
SECURE_FLAG);
}
/**
......
This diff is collapsed.
......@@ -14,67 +14,86 @@
* PM API function declarations
**********************************************************/
enum pm_ret_status pm_get_api_version(unsigned int *version);
enum pm_ret_status pm_init_finalize(void);
enum pm_ret_status pm_get_api_version(unsigned int *version, uint32_t flag);
enum pm_ret_status pm_init_finalize(uint32_t flag);
enum pm_ret_status pm_self_suspend(uint32_t nid,
unsigned int latency,
unsigned int state,
uintptr_t address);
enum pm_ret_status pm_abort_suspend(enum pm_abort_reason reason);
uintptr_t address, uint32_t flag);
enum pm_ret_status pm_abort_suspend(enum pm_abort_reason reason, uint32_t flag);
enum pm_ret_status pm_req_suspend(uint32_t target,
uint8_t ack,
unsigned int latency,
unsigned int state);
unsigned int state, uint32_t flag);
enum pm_ret_status pm_req_wakeup(uint32_t target, uint32_t set_address,
uintptr_t address, uint8_t ack);
uintptr_t address, uint8_t ack, uint32_t flag);
enum pm_ret_status pm_set_wakeup_source(uint32_t target, uint32_t device_id,
uint8_t enable);
uint8_t enable, uint32_t flag);
enum pm_ret_status pm_request_device(uint32_t device_id, uint32_t capabilities,
uint32_t qos, uint32_t ack);
enum pm_ret_status pm_release_device(uint32_t device_id);
uint32_t qos, uint32_t ack, uint32_t flag);
enum pm_ret_status pm_release_device(uint32_t device_id, uint32_t flag);
enum pm_ret_status pm_set_requirement(uint32_t device_id, uint32_t capabilities,
uint32_t latency, uint32_t qos);
enum pm_ret_status pm_get_device_status(uint32_t device_id, uint32_t *response);
enum pm_ret_status pm_reset_assert(uint32_t reset, bool assert);
enum pm_ret_status pm_reset_get_status(uint32_t reset, uint32_t *status);
void pm_get_callbackdata(uint32_t *data, size_t count);
enum pm_ret_status pm_pinctrl_request(uint32_t pin);
enum pm_ret_status pm_pinctrl_release(uint32_t pin);
enum pm_ret_status pm_pinctrl_set_function(uint32_t pin, uint32_t function);
enum pm_ret_status pm_pinctrl_get_function(uint32_t pin, uint32_t *function);
uint32_t latency, uint32_t qos,
uint32_t flag);
enum pm_ret_status pm_get_device_status(uint32_t device_id, uint32_t *response,
uint32_t flag);
enum pm_ret_status pm_reset_assert(uint32_t reset, bool assert, uint32_t flag);
enum pm_ret_status pm_reset_get_status(uint32_t reset, uint32_t *status,
uint32_t flag);
void pm_get_callbackdata(uint32_t *data, size_t count, uint32_t flag);
enum pm_ret_status pm_pinctrl_request(uint32_t pin, uint32_t flag);
enum pm_ret_status pm_pinctrl_release(uint32_t pin, uint32_t flag);
enum pm_ret_status pm_pinctrl_set_function(uint32_t pin, uint32_t function,
uint32_t flag);
enum pm_ret_status pm_pinctrl_get_function(uint32_t pin, uint32_t *function,
uint32_t flag);
enum pm_ret_status pm_pinctrl_set_pin_param(uint32_t pin, uint32_t param,
uint32_t value);
uint32_t value, uint32_t flag);
enum pm_ret_status pm_pinctrl_get_pin_param(uint32_t pin, uint32_t param,
uint32_t *value);
enum pm_ret_status pm_clock_enable(uint32_t clk_id);
enum pm_ret_status pm_clock_disable(uint32_t clk_id);
enum pm_ret_status pm_clock_get_state(uint32_t clk_id, uint32_t *state);
enum pm_ret_status pm_clock_set_divider(uint32_t clk_id, uint32_t divider);
enum pm_ret_status pm_clock_get_divider(uint32_t clk_id, uint32_t *divider);
enum pm_ret_status pm_clock_set_parent(uint32_t clk_id, uint32_t parent);
enum pm_ret_status pm_clock_get_parent(uint32_t clk_id, uint32_t *parent);
enum pm_ret_status pm_clock_get_rate(uint32_t clk_id, uint32_t *clk_rate);
uint32_t *value, uint32_t flag);
enum pm_ret_status pm_clock_enable(uint32_t clk_id, uint32_t flag);
enum pm_ret_status pm_clock_disable(uint32_t clk_id, uint32_t flag);
enum pm_ret_status pm_clock_get_state(uint32_t clk_id, uint32_t *state,
uint32_t flag);
enum pm_ret_status pm_clock_set_divider(uint32_t clk_id, uint32_t divider,
uint32_t flag);
enum pm_ret_status pm_clock_get_divider(uint32_t clk_id, uint32_t *divider,
uint32_t flag);
enum pm_ret_status pm_clock_set_parent(uint32_t clk_id, uint32_t parent,
uint32_t flag);
enum pm_ret_status pm_clock_get_parent(uint32_t clk_id, uint32_t *parent,
uint32_t flag);
enum pm_ret_status pm_clock_get_rate(uint32_t clk_id, uint32_t *clk_rate,
uint32_t flag);
enum pm_ret_status pm_pll_set_param(uint32_t clk_id, uint32_t param,
uint32_t value);
uint32_t value, uint32_t flag);
enum pm_ret_status pm_pll_get_param(uint32_t clk_id, uint32_t param,
uint32_t *value);
enum pm_ret_status pm_pll_set_mode(uint32_t clk_id, uint32_t mode);
enum pm_ret_status pm_pll_get_mode(uint32_t clk_id, uint32_t *mode);
enum pm_ret_status pm_force_powerdown(uint32_t target, uint8_t ack);
enum pm_ret_status pm_system_shutdown(uint32_t type, uint32_t subtype);
uint32_t *value, uint32_t flag);
enum pm_ret_status pm_pll_set_mode(uint32_t clk_id, uint32_t mode,
uint32_t flag);
enum pm_ret_status pm_pll_get_mode(uint32_t clk_id, uint32_t *mode,
uint32_t flag);
enum pm_ret_status pm_force_powerdown(uint32_t target, uint8_t ack,
uint32_t flag);
enum pm_ret_status pm_system_shutdown(uint32_t type, uint32_t subtype,
uint32_t flag);
enum pm_ret_status pm_api_ioctl(uint32_t device_id, uint32_t ioctl_id,
uint32_t arg1, uint32_t arg2, uint32_t *value);
uint32_t arg1, uint32_t arg2, uint32_t *value,
uint32_t flag);
enum pm_ret_status pm_query_data(uint32_t qid, uint32_t arg1, uint32_t arg2,
uint32_t arg3, uint32_t *data);
uint32_t arg3, uint32_t *data, uint32_t flag);
unsigned int pm_get_shutdown_scope(void);
enum pm_ret_status pm_get_chipid(uint32_t *value);
enum pm_ret_status pm_feature_check(uint32_t api_id, unsigned int *version);
enum pm_ret_status pm_get_chipid(uint32_t *value, uint32_t flag);
enum pm_ret_status pm_feature_check(uint32_t api_id, unsigned int *version,
uint32_t flag);
enum pm_ret_status pm_load_pdi(uint32_t src, uint32_t address_low,
uint32_t address_high);
uint32_t address_high, uint32_t flag);
enum pm_ret_status pm_get_op_characteristic(uint32_t device_id,
enum pm_opchar_type type,
uint32_t *result);
enum pm_ret_status pm_set_max_latency(uint32_t device_id, uint32_t latency);
uint32_t *result, uint32_t flag);
enum pm_ret_status pm_set_max_latency(uint32_t device_id, uint32_t latency,
uint32_t flag);
enum pm_ret_status pm_register_notifier(uint32_t device_id, uint32_t event,
uint32_t wake, uint32_t enable);
uint32_t wake, uint32_t enable,
uint32_t flag);
#endif /* PM_API_SYS_H */
......@@ -149,7 +149,8 @@ static void pm_client_set_wakeup_sources(uint32_t node_id)
/* Get device ID from node index */
device_id = PERIPH_DEVID(node_idx);
ret = pm_set_wakeup_source(node_id,
device_id, 1);
device_id, 1,
SECURE_FLAG);
pm_wakeup_nodes_set[node_idx] = !ret;
}
}
......
......@@ -71,6 +71,7 @@ uint64_t pm_smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3,
enum pm_ret_status ret;
uint32_t pm_arg[4];
uint32_t security_flag = SECURE_FLAG;
/* Handle case where PM wasn't initialized properly */
if (!pm_up)
......@@ -81,57 +82,67 @@ uint64_t pm_smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3,
pm_arg[2] = (uint32_t)x2;
pm_arg[3] = (uint32_t)(x2 >> 32);
/*
* Mark BIT24 payload (i.e 1st bit of pm_arg[3] ) as non-secure (1)
* if smc called is non secure
*/
if (is_caller_non_secure(flags)) {
security_flag = NON_SECURE_FLAG;
}
switch (smc_fid & FUNCID_NUM_MASK) {
/* PM API Functions */
case PM_SELF_SUSPEND:
ret = pm_self_suspend(pm_arg[0], pm_arg[1], pm_arg[2],
pm_arg[3]);
pm_arg[3], security_flag);
SMC_RET1(handle, (uint64_t)ret);
case PM_FORCE_POWERDOWN:
ret = pm_force_powerdown(pm_arg[0], pm_arg[1]);
ret = pm_force_powerdown(pm_arg[0], pm_arg[1], security_flag);
SMC_RET1(handle, (uint64_t)ret);
case PM_REQ_SUSPEND:
ret = pm_req_suspend(pm_arg[0], pm_arg[1], pm_arg[2],
pm_arg[3]);
pm_arg[3], security_flag);
SMC_RET1(handle, (uint64_t)ret);
case PM_ABORT_SUSPEND:
ret = pm_abort_suspend(pm_arg[0]);
ret = pm_abort_suspend(pm_arg[0], security_flag);
SMC_RET1(handle, (uint64_t)ret);
case PM_SYSTEM_SHUTDOWN:
ret = pm_system_shutdown(pm_arg[0], pm_arg[1]);
ret = pm_system_shutdown(pm_arg[0], pm_arg[1], security_flag);
SMC_RET1(handle, (uint64_t)ret);
case PM_REQ_WAKEUP:
ret = pm_req_wakeup(pm_arg[0], pm_arg[1], pm_arg[2], pm_arg[3]);
ret = pm_req_wakeup(pm_arg[0], pm_arg[1], pm_arg[2], pm_arg[3],
security_flag);
SMC_RET1(handle, (uint64_t)ret);
case PM_SET_WAKEUP_SOURCE:
ret = pm_set_wakeup_source(pm_arg[0], pm_arg[1], pm_arg[2]);
ret = pm_set_wakeup_source(pm_arg[0], pm_arg[1], pm_arg[2],
security_flag);
SMC_RET1(handle, (uint64_t)ret);
case PM_REQUEST_DEVICE:
ret = pm_request_device(pm_arg[0], pm_arg[1], pm_arg[2],
pm_arg[3]);
pm_arg[3], security_flag);
SMC_RET1(handle, (uint64_t)ret);
case PM_RELEASE_DEVICE:
ret = pm_release_device(pm_arg[0]);
ret = pm_release_device(pm_arg[0], security_flag);
SMC_RET1(handle, (uint64_t)ret);
case PM_SET_REQUIREMENT:
ret = pm_set_requirement(pm_arg[0], pm_arg[1], pm_arg[2],
pm_arg[3]);
pm_arg[3], security_flag);
SMC_RET1(handle, (uint64_t)ret);
case PM_GET_API_VERSION:
{
uint32_t api_version;
ret = pm_get_api_version(&api_version);
ret = pm_get_api_version(&api_version, security_flag);
SMC_RET1(handle, (uint64_t)PM_RET_SUCCESS |
((uint64_t)api_version << 32));
}
......@@ -140,68 +151,72 @@ uint64_t pm_smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3,
{
uint32_t buff[3];
ret = pm_get_device_status(pm_arg[0], buff);
ret = pm_get_device_status(pm_arg[0], buff, security_flag);
SMC_RET2(handle, (uint64_t)ret | ((uint64_t)buff[0] << 32),
(uint64_t)buff[1] | ((uint64_t)buff[2] << 32));
}
case PM_RESET_ASSERT:
ret = pm_reset_assert(pm_arg[0], pm_arg[1]);
ret = pm_reset_assert(pm_arg[0], pm_arg[1], security_flag);
SMC_RET1(handle, (uint64_t)ret);
case PM_RESET_GET_STATUS:
{
uint32_t reset_status;
ret = pm_reset_get_status(pm_arg[0], &reset_status);
ret = pm_reset_get_status(pm_arg[0], &reset_status,
security_flag);
SMC_RET1(handle, (uint64_t)ret |
((uint64_t)reset_status << 32));
}
case PM_INIT_FINALIZE:
ret = pm_init_finalize();
ret = pm_init_finalize(security_flag);
SMC_RET1(handle, (uint64_t)ret);
case PM_GET_CALLBACK_DATA:
{
uint32_t result[4] = {0};
pm_get_callbackdata(result, ARRAY_SIZE(result));
pm_get_callbackdata(result, ARRAY_SIZE(result), security_flag);
SMC_RET2(handle,
(uint64_t)result[0] | ((uint64_t)result[1] << 32),
(uint64_t)result[2] | ((uint64_t)result[3] << 32));
}
case PM_PINCTRL_REQUEST:
ret = pm_pinctrl_request(pm_arg[0]);
ret = pm_pinctrl_request(pm_arg[0], security_flag);
SMC_RET1(handle, (uint64_t)ret);
case PM_PINCTRL_RELEASE:
ret = pm_pinctrl_release(pm_arg[0]);
ret = pm_pinctrl_release(pm_arg[0], security_flag);
SMC_RET1(handle, (uint64_t)ret);
case PM_PINCTRL_GET_FUNCTION:
{
uint32_t value = 0;
ret = pm_pinctrl_get_function(pm_arg[0], &value);
ret = pm_pinctrl_get_function(pm_arg[0], &value, security_flag);
SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32);
}
case PM_PINCTRL_SET_FUNCTION:
ret = pm_pinctrl_set_function(pm_arg[0], pm_arg[1]);
ret = pm_pinctrl_set_function(pm_arg[0], pm_arg[1],
security_flag);
SMC_RET1(handle, (uint64_t)ret);
case PM_PINCTRL_CONFIG_PARAM_GET:
{
uint32_t value;
ret = pm_pinctrl_get_pin_param(pm_arg[0], pm_arg[1], &value);
ret = pm_pinctrl_get_pin_param(pm_arg[0], pm_arg[1], &value,
security_flag);
SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32);
}
case PM_PINCTRL_CONFIG_PARAM_SET:
ret = pm_pinctrl_set_pin_param(pm_arg[0], pm_arg[1], pm_arg[2]);
ret = pm_pinctrl_set_pin_param(pm_arg[0], pm_arg[1], pm_arg[2],
security_flag);
SMC_RET1(handle, (uint64_t)ret);
case PM_IOCTL:
......@@ -209,7 +224,7 @@ uint64_t pm_smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3,
uint32_t value;
ret = pm_api_ioctl(pm_arg[0], pm_arg[1], pm_arg[2],
pm_arg[3], &value);
pm_arg[3], &value, security_flag);
SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32);
}
......@@ -218,49 +233,49 @@ uint64_t pm_smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3,
uint32_t data[8] = { 0 };
ret = pm_query_data(pm_arg[0], pm_arg[1], pm_arg[2],
pm_arg[3], data);
pm_arg[3], data, security_flag);
SMC_RET2(handle, (uint64_t)ret | ((uint64_t)data[0] << 32),
(uint64_t)data[1] | ((uint64_t)data[2] << 32));
}
case PM_CLOCK_ENABLE:
ret = pm_clock_enable(pm_arg[0]);
ret = pm_clock_enable(pm_arg[0], security_flag);
SMC_RET1(handle, (uint64_t)ret);
case PM_CLOCK_DISABLE:
ret = pm_clock_disable(pm_arg[0]);
ret = pm_clock_disable(pm_arg[0], security_flag);
SMC_RET1(handle, (uint64_t)ret);
case PM_CLOCK_GETSTATE:
{
uint32_t value;
ret = pm_clock_get_state(pm_arg[0], &value);
ret = pm_clock_get_state(pm_arg[0], &value, security_flag);
SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32);
}
case PM_CLOCK_SETDIVIDER:
ret = pm_clock_set_divider(pm_arg[0], pm_arg[1]);
ret = pm_clock_set_divider(pm_arg[0], pm_arg[1], security_flag);
SMC_RET1(handle, (uint64_t)ret);
case PM_CLOCK_GETDIVIDER:
{
uint32_t value;
ret = pm_clock_get_divider(pm_arg[0], &value);
ret = pm_clock_get_divider(pm_arg[0], &value, security_flag);
SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32);
}
case PM_CLOCK_SETPARENT:
ret = pm_clock_set_parent(pm_arg[0], pm_arg[1]);
ret = pm_clock_set_parent(pm_arg[0], pm_arg[1], security_flag);
SMC_RET1(handle, (uint64_t)ret);
case PM_CLOCK_GETPARENT:
{
uint32_t value;
ret = pm_clock_get_parent(pm_arg[0], &value);
ret = pm_clock_get_parent(pm_arg[0], &value, security_flag);
SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32);
}
......@@ -268,32 +283,34 @@ uint64_t pm_smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3,
{
uint32_t rate[2] = { 0 };
ret = pm_clock_get_rate(pm_arg[0], rate);
ret = pm_clock_get_rate(pm_arg[0], rate, security_flag);
SMC_RET2(handle, (uint64_t)ret | ((uint64_t)rate[0] << 32),
rate[1]);
}
case PM_PLL_SET_PARAMETER:
ret = pm_pll_set_param(pm_arg[0], pm_arg[1], pm_arg[2]);
ret = pm_pll_set_param(pm_arg[0], pm_arg[1], pm_arg[2],
security_flag);
SMC_RET1(handle, (uint64_t)ret);
case PM_PLL_GET_PARAMETER:
{
uint32_t value;
ret = pm_pll_get_param(pm_arg[0], pm_arg[1], &value);
ret = pm_pll_get_param(pm_arg[0], pm_arg[1], &value,
security_flag);
SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value << 32));
}
case PM_PLL_SET_MODE:
ret = pm_pll_set_mode(pm_arg[0], pm_arg[1]);
ret = pm_pll_set_mode(pm_arg[0], pm_arg[1], security_flag);
SMC_RET1(handle, (uint64_t)ret);
case PM_PLL_GET_MODE:
{
uint32_t mode;
ret = pm_pll_get_mode(pm_arg[0], &mode);
ret = pm_pll_get_mode(pm_arg[0], &mode, security_flag);
SMC_RET1(handle, (uint64_t)ret | ((uint64_t)mode << 32));
}
......@@ -305,7 +322,7 @@ uint64_t pm_smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3,
{
uint32_t result[2];
ret = pm_get_chipid(result);
ret = pm_get_chipid(result, security_flag);
SMC_RET2(handle, (uint64_t)ret | ((uint64_t)result[0] << 32),
result[1]);
}
......@@ -314,13 +331,14 @@ uint64_t pm_smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3,
{
uint32_t version;
ret = pm_feature_check(pm_arg[0], &version);
ret = pm_feature_check(pm_arg[0], &version, security_flag);
SMC_RET1(handle, (uint64_t)ret | ((uint64_t)version << 32));
}
case PM_LOAD_PDI:
{
ret = pm_load_pdi(pm_arg[0], pm_arg[1], pm_arg[2]);
ret = pm_load_pdi(pm_arg[0], pm_arg[1], pm_arg[2],
security_flag);
SMC_RET1(handle, (uint64_t)ret);
}
......@@ -328,19 +346,21 @@ uint64_t pm_smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3,
{
uint32_t result;
ret = pm_get_op_characteristic(pm_arg[0], pm_arg[1], &result);
ret = pm_get_op_characteristic(pm_arg[0], pm_arg[1], &result,
security_flag);
SMC_RET1(handle, (uint64_t)ret | ((uint64_t)result << 32));
}
case PM_SET_MAX_LATENCY:
{
ret = pm_set_max_latency(pm_arg[0], pm_arg[1]);
ret = pm_set_max_latency(pm_arg[0], pm_arg[1], security_flag);
SMC_RET1(handle, (uint64_t)ret);
}
case PM_REGISTER_NOTIFIER:
{
ret = pm_register_notifier(pm_arg[0], pm_arg[1], pm_arg[2], pm_arg[3]);
ret = pm_register_notifier(pm_arg[0], pm_arg[1], pm_arg[2],
pm_arg[3], security_flag);
SMC_RET1(handle, (uint64_t)ret);
}
......
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