From eb75518d988e8a59f21ab1ac77e5ae928526e06e Mon Sep 17 00:00:00 2001 From: Samuel Holland Date: Sun, 20 Oct 2019 14:17:30 -0500 Subject: [PATCH] allwinner: Enable clock before resetting I2C/RSB The clock must be running for the module to be reset. Signed-off-by: Samuel Holland Change-Id: Ic8fafc946f3a1a697174b91288e357ffa033ab9a --- plat/allwinner/common/sunxi_common.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/plat/allwinner/common/sunxi_common.c b/plat/allwinner/common/sunxi_common.c index 0797452a6..1e21a4262 100644 --- a/plat/allwinner/common/sunxi_common.c +++ b/plat/allwinner/common/sunxi_common.c @@ -150,16 +150,16 @@ int sunxi_init_platform_r_twi(uint16_t socid, bool use_rsb) /* set both pins to pull-up */ mmio_clrsetbits_32(SUNXI_R_PIO_BASE + 0x1c, 0x0fU, 0x5U); - /* assert, then de-assert reset of I2C/RSB controller */ - mmio_clrbits_32(SUNXI_R_PRCM_BASE + reset_offset, device_bit); - mmio_setbits_32(SUNXI_R_PRCM_BASE + reset_offset, device_bit); - /* un-gate clock */ if (socid != SUNXI_SOC_H6) mmio_setbits_32(SUNXI_R_PRCM_BASE + 0x28, device_bit); else mmio_setbits_32(SUNXI_R_PRCM_BASE + 0x19c, device_bit | BIT(0)); + /* assert, then de-assert reset of I2C/RSB controller */ + mmio_clrbits_32(SUNXI_R_PRCM_BASE + reset_offset, device_bit); + mmio_setbits_32(SUNXI_R_PRCM_BASE + reset_offset, device_bit); + return 0; } -- GitLab