From ed1587d0257361cd9f78a134012df394bfe5eb63 Mon Sep 17 00:00:00 2001 From: Guo Yi Date: Wed, 17 Feb 2021 00:56:48 +0000 Subject: [PATCH] plat: marvell: armada: a8k: Fix LD selector mask Fixed a bug that the actually bit number was used as a mask to select LD0 or LD1 fuse Signed-off-by: Guo Yi Change-Id: I4bec268c3dc2566350b4a73f655bce222707e25b Reviewed-on: https://sj1git1.cavium.com/c/IP/SW/boot/atf/+/46146 Tested-by: sa_ip-sw-jenkins Reviewed-by: Kostya Porotchkin --- plat/marvell/armada/a8k/common/plat_ble_setup.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/plat/marvell/armada/a8k/common/plat_ble_setup.c b/plat/marvell/armada/a8k/common/plat_ble_setup.c index 41143276a..59a3a3ae1 100644 --- a/plat/marvell/armada/a8k/common/plat_ble_setup.c +++ b/plat/marvell/armada/a8k/common/plat_ble_setup.c @@ -383,7 +383,7 @@ static void ble_plat_svc_config(void) /* Set access to LD0 */ reg_val = mmio_read_32(MVEBU_AP_EFUSE_SRV_CTRL_REG); - reg_val &= ~EFUSE_SRV_CTRL_LD_SELECT_OFFS; + reg_val &= ~EFUSE_SRV_CTRL_LD_SEL_USER_MASK; mmio_write_32(MVEBU_AP_EFUSE_SRV_CTRL_REG, reg_val); /* Obtain the value of LD0[125:63] */ -- GitLab