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Commit f46e1f18 authored by Flora Fu's avatar Flora Fu
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feat(plat/mediatek/apu): add mt8192 APU device apc driver 



Add APU device apc driver and setup permission.
Signed-off-by: default avatarFlora Fu <flora.fu@mediatek.com>
Change-Id: I2bbdb69d11267e4252b2138b5c5ac8faf752740f
parent ca4c0c2e
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Inline Side-by-side
plat/mediatek/mt8192/drivers/apusys/mtk_apusys_apc.c 0 → 100644
View file @ f46e1f18
/*
* Copyright (c) 2021, MediaTek Inc. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <common/debug.h>
#include <mtk_apusys_apc.h>
#include <mtk_apusys_apc_def.h>
#include <mtk_plat_common.h>
#include <platform_def.h>
static const struct APC_DOM_16 APUSYS_NOC_DAPC_AO[] = {
/* 0~3 */
APUSYS_APC_AO_ATTR("slv07-0",
NO_PROTECTION, NO_PROTECTION, NO_PROTECTION, NO_PROTECTION,
NO_PROTECTION, NO_PROTECTION, NO_PROTECTION, NO_PROTECTION,
NO_PROTECTION, NO_PROTECTION, NO_PROTECTION, NO_PROTECTION,
NO_PROTECTION, NO_PROTECTION, NO_PROTECTION, NO_PROTECTION),
APUSYS_APC_AO_ATTR("slv07-1",
NO_PROTECTION, NO_PROTECTION, NO_PROTECTION, NO_PROTECTION,
NO_PROTECTION, NO_PROTECTION, NO_PROTECTION, NO_PROTECTION,
NO_PROTECTION, NO_PROTECTION, NO_PROTECTION, NO_PROTECTION,
NO_PROTECTION, NO_PROTECTION, NO_PROTECTION, NO_PROTECTION),
APUSYS_APC_AO_ATTR("slv07-2",
NO_PROTECTION, NO_PROTECTION, NO_PROTECTION, NO_PROTECTION,
NO_PROTECTION, NO_PROTECTION, NO_PROTECTION, NO_PROTECTION,
NO_PROTECTION, NO_PROTECTION, NO_PROTECTION, NO_PROTECTION,
NO_PROTECTION, NO_PROTECTION, NO_PROTECTION, NO_PROTECTION),
APUSYS_APC_AO_ATTR("slv07-3",
NO_PROTECTION, NO_PROTECTION, NO_PROTECTION, NO_PROTECTION,
NO_PROTECTION, NO_PROTECTION, NO_PROTECTION, NO_PROTECTION,
NO_PROTECTION, NO_PROTECTION, NO_PROTECTION, NO_PROTECTION,
NO_PROTECTION, NO_PROTECTION, NO_PROTECTION, NO_PROTECTION),
/* 16~18 */
APUSYS_APC_AO_ATTR("slv01-0",
NO_PROTECTION, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN),
APUSYS_APC_AO_ATTR("slv01-1",
NO_PROTECTION, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN),
APUSYS_APC_AO_ATTR("slv01-2",
NO_PROTECTION, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN),
/* 19~21 */
APUSYS_APC_AO_ATTR("slv00-0",
NO_PROTECTION, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN),
APUSYS_APC_AO_ATTR("slv00-1",
NO_PROTECTION, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN),
APUSYS_APC_AO_ATTR("slv00-2",
NO_PROTECTION, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN),
/* 22~26 */
APUSYS_APC_AO_ATTR("slv02-0",
NO_PROTECTION, NO_PROTECTION, NO_PROTECTION, NO_PROTECTION,
NO_PROTECTION, NO_PROTECTION, NO_PROTECTION, NO_PROTECTION,
NO_PROTECTION, NO_PROTECTION, NO_PROTECTION, NO_PROTECTION,
NO_PROTECTION, NO_PROTECTION, NO_PROTECTION, NO_PROTECTION),
APUSYS_APC_AO_ATTR("slv02-1",
NO_PROTECTION, NO_PROTECTION, NO_PROTECTION, NO_PROTECTION,
NO_PROTECTION, NO_PROTECTION, NO_PROTECTION, NO_PROTECTION,
NO_PROTECTION, NO_PROTECTION, NO_PROTECTION, NO_PROTECTION,
NO_PROTECTION, NO_PROTECTION, NO_PROTECTION, NO_PROTECTION),
APUSYS_APC_AO_ATTR("slv02-2",
NO_PROTECTION, NO_PROTECTION, NO_PROTECTION, NO_PROTECTION,
NO_PROTECTION, NO_PROTECTION, NO_PROTECTION, NO_PROTECTION,
NO_PROTECTION, NO_PROTECTION, NO_PROTECTION, NO_PROTECTION,
NO_PROTECTION, NO_PROTECTION, NO_PROTECTION, NO_PROTECTION),
APUSYS_APC_AO_ATTR("slv02-3",
NO_PROTECTION, NO_PROTECTION, NO_PROTECTION, NO_PROTECTION,
NO_PROTECTION, NO_PROTECTION, NO_PROTECTION, NO_PROTECTION,
NO_PROTECTION, NO_PROTECTION, NO_PROTECTION, NO_PROTECTION,
NO_PROTECTION, NO_PROTECTION, NO_PROTECTION, NO_PROTECTION),
APUSYS_APC_AO_ATTR("slv02-4",
NO_PROTECTION, NO_PROTECTION, NO_PROTECTION, NO_PROTECTION,
NO_PROTECTION, NO_PROTECTION, NO_PROTECTION, NO_PROTECTION,
NO_PROTECTION, NO_PROTECTION, NO_PROTECTION, NO_PROTECTION,
NO_PROTECTION, NO_PROTECTION, NO_PROTECTION, NO_PROTECTION),
};
static int32_t set_slave_noc_dapc(uint32_t slave,
enum APUSYS_APC_DOMAIN_ID domain_id,
enum APUSYS_APC_PERM_TYPE perm)
{
uint32_t apc_register_index;
uint32_t apc_set_index;
uintptr_t base;
uint32_t clr_bit;
uint32_t set_bit;
int32_t ret;
if (perm >= PERM_NUM) {
ERROR("[NOC_DAPC] perm type:0x%x is not supported!\n", perm);
ret = APUSYS_APC_ERR_PERMISSION_NOT_SUPPORTED;
goto exit;
}
apc_register_index = slave / APUSYS_NOC_DAPC_AO_SLAVE_NUM_IN_1_DOM;
apc_set_index = slave % APUSYS_NOC_DAPC_AO_SLAVE_NUM_IN_1_DOM;
clr_bit = 0xFFFFFFFF ^ (0x3U << (apc_set_index * 2));
set_bit = perm << (apc_set_index * 2);
if ((slave < APUSYS_NOC_DAPC_AO_SLAVE_NUM) &&
(domain_id < APUSYS_NOC_DAPC_AO_DOM_NUM)) {
base = APUSYS_NOC_DAPC_AO_BASE +
(domain_id * 0x40) + (apc_register_index * 4);
apuapc_writel(apuapc_readl(base) & clr_bit, base);
apuapc_writel(apuapc_readl(base) | set_bit, base);
ret = APUSYS_APC_OK;
} else {
ERROR("[NOC_DAPC] %s: %s, %s:0x%x, %s:0x%x\n",
__func__, "out of boundary",
"slave", slave,
"domain_id", domain_id);
ret = APUSYS_APC_ERR_OUT_OF_BOUNDARY;
}
exit:
return ret;
}
static void dump_apusys_noc_dapc(void)
{
uint32_t reg_num;
uint32_t d, i;
reg_num = APUSYS_NOC_DAPC_AO_SLAVE_NUM /
APUSYS_NOC_DAPC_AO_SLAVE_NUM_IN_1_DOM;
for (d = 0U; d < APUSYS_NOC_DAPC_AO_DOM_NUM; d++) {
for (i = 0U; i <= reg_num; i++) {
INFO("[NOCDAPC] D%d_APC_%d: 0x%x\n", d, i,
apuapc_readl(APUSYS_NOC_DAPC_AO_BASE +
(d * 0x40) + (i * 4)));
}
}
INFO("[NOCDAPC] APC_CON: 0x%x\n", apuapc_readl(APUSYS_NOC_DAPC_CON));
}
static const struct APC_DOM_16 APUSYS_AO_Devices[] = {
/* 0 */
APUSYS_APC_AO_ATTR("apusys_ao-0",
NO_PROTECTION, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN),
APUSYS_APC_AO_ATTR("apusys_ao-1",
NO_PROTECTION, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN),
APUSYS_APC_AO_ATTR("apusys_ao-2",
SEC_RW_ONLY, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN),
APUSYS_APC_AO_ATTR("apusys_ao-3",
NO_PROTECTION, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN),
APUSYS_APC_AO_ATTR("apusys_ao-4",
SEC_RW_ONLY, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN),
APUSYS_APC_AO_ATTR("apusys_ao-5",
SEC_RW_ONLY, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN),
APUSYS_APC_AO_ATTR("md32_apb_s-0",
NO_PROTECTION, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN),
APUSYS_APC_AO_ATTR("md32_apb_s-1",
NO_PROTECTION, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN),
APUSYS_APC_AO_ATTR("md32_apb_s-2",
NO_PROTECTION, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN),
APUSYS_APC_AO_ATTR("md32_debug_apb",
NO_PROTECTION, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN),
/* 10 */
APUSYS_APC_AO_ATTR("apu_conn_config",
NO_PROTECTION, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN),
APUSYS_APC_AO_ATTR("apu_sctrl_reviser",
SEC_RW_ONLY, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN),
APUSYS_APC_AO_ATTR("apu_sema_stimer",
NO_PROTECTION, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN),
APUSYS_APC_AO_ATTR("apu_emi_config",
NO_PROTECTION, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN),
APUSYS_APC_AO_ATTR("apu_adl",
NO_PROTECTION, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN),
APUSYS_APC_AO_ATTR("apu_edma_lite0",
NO_PROTECTION, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN),
APUSYS_APC_AO_ATTR("apu_edma_lite1",
NO_PROTECTION, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN),
APUSYS_APC_AO_ATTR("apu_edma0",
NO_PROTECTION, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN),
APUSYS_APC_AO_ATTR("apu_edma0",
NO_PROTECTION, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN),
APUSYS_APC_AO_ATTR("apu_dapc_ao",
NO_PROTECTION, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN),
/* 20 */
APUSYS_APC_AO_ATTR("apu_dapc",
NO_PROTECTION, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN),
APUSYS_APC_AO_ATTR("infra_bcrm",
NO_PROTECTION, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN),
APUSYS_APC_AO_ATTR("apb_dbg_ctl",
NO_PROTECTION, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN),
APUSYS_APC_AO_ATTR("noc_dapc",
NO_PROTECTION, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN),
APUSYS_APC_AO_ATTR("apu_noc_bcrm",
NO_PROTECTION, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN),
APUSYS_APC_AO_ATTR("apu_noc_config",
NO_PROTECTION, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN),
APUSYS_APC_AO_ATTR("vpu_core0_config-0",
NO_PROTECTION, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN),
APUSYS_APC_AO_ATTR("vpu_core0_config-1",
NO_PROTECTION, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN),
APUSYS_APC_AO_ATTR("vpu_core1_config-0",
NO_PROTECTION, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN),
APUSYS_APC_AO_ATTR("vpu_core1_config-1",
NO_PROTECTION, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN),
/* 30 */
APUSYS_APC_AO_ATTR("mdla0_apb-0",
NO_PROTECTION, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN),
APUSYS_APC_AO_ATTR("mdla0_apb-1",
NO_PROTECTION, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN),
APUSYS_APC_AO_ATTR("mdla0_apb-2",
NO_PROTECTION, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN),
APUSYS_APC_AO_ATTR("mdla0_apb-3",
NO_PROTECTION, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN),
APUSYS_APC_AO_ATTR("apu_iommu0_r0",
NO_PROTECTION, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN),
APUSYS_APC_AO_ATTR("apu_iommu0_r1",
SEC_RW_ONLY, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN),
APUSYS_APC_AO_ATTR("apu_iommu0_r2",
SEC_RW_ONLY, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN),
APUSYS_APC_AO_ATTR("apu_iommu0_r3",
SEC_RW_ONLY, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN),
APUSYS_APC_AO_ATTR("apu_iommu0_r4",
SEC_RW_ONLY, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN),
APUSYS_APC_AO_ATTR("apu_rsi2_config",
NO_PROTECTION, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN),
/* 40 */
APUSYS_APC_AO_ATTR("apu_ssc2_config",
NO_PROTECTION, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN),
APUSYS_APC_AO_ATTR("vp6_core0_debug_apb",
NO_PROTECTION, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN),
APUSYS_APC_AO_ATTR("vp6_core1_debug_apb",
NO_PROTECTION, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN,
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN),
};
static int32_t set_slave_apc(uint32_t slave,
enum APUSYS_APC_DOMAIN_ID domain_id,
enum APUSYS_APC_PERM_TYPE perm)
{
uint32_t apc_register_index;
uint32_t apc_set_index;
uintptr_t base;
uint32_t clr_bit;
uint32_t set_bit;
int32_t ret;
if (perm >= PERM_NUM) {
ERROR("[APUAPC] perm type:0x%x is not supported!\n", perm);
ret = APUSYS_APC_ERR_PERMISSION_NOT_SUPPORTED;
goto exit;
}
apc_register_index = slave / APUSYS_APC_SYS0_AO_SLAVE_NUM_IN_1_DOM;
apc_set_index = slave % APUSYS_APC_SYS0_AO_SLAVE_NUM_IN_1_DOM;
clr_bit = 0xFFFFFFFF ^ (0x3U << (apc_set_index * 2));
set_bit = perm << (apc_set_index * 2);
if ((slave < APUSYS_APC_SYS0_AO_SLAVE_NUM) &&
(domain_id < APUSYS_APC_SYS0_AO_DOM_NUM)) {
base = APUSYS_APC_AO_BASE +
(domain_id * 0x40) + (apc_register_index * 4);
apuapc_writel(apuapc_readl(base) & clr_bit, base);
apuapc_writel(apuapc_readl(base) | set_bit, base);
ret = APUSYS_APC_OK;
} else {
ERROR("[APUAPC] %s: %s, %s:0x%x, %s:0x%x\n",
__func__, "out of boundary",
"slave", slave,
"domain_id", domain_id);
ret = APUSYS_APC_ERR_OUT_OF_BOUNDARY;
}
exit:
return ret;
}
static void dump_apusys_ao_apc(void)
{
uint32_t reg_num;
uint32_t d, i;
reg_num = APUSYS_APC_SYS0_AO_SLAVE_NUM /
APUSYS_APC_SYS0_AO_SLAVE_NUM_IN_1_DOM;
for (d = 0U; d < APUSYS_APC_SYS0_AO_DOM_NUM; d++) {
for (i = 0U; i <= reg_num; i++) {
INFO("[APUAPC] D%d_APC_%d: 0x%x\n", d, i,
apuapc_readl(APUSYS_APC_AO_BASE +
(d * 0x40) + (i * 4)));
}
}
INFO("[APUAPC] APC_CON: 0x%x\n", apuapc_readl(APUSYS_APC_CON));
}
static int32_t set_apusys_noc_dapc(void)
{
int32_t ret = 0;
uint32_t i;
uint32_t index;
for (i = 0U; i < ARRAY_SIZE(APUSYS_NOC_DAPC_AO); i++) {
if (i < APUSYS_NOC_DAPC_GAP_BOUNDARY) {
index = i;
} else {
index = i + APUSYS_NOC_DAPC_JUMP_GAP;
}
ret += set_slave_noc_dapc(index, DOMAIN_0,
APUSYS_NOC_DAPC_AO[i].d0_permission);
ret += set_slave_noc_dapc(index, DOMAIN_1,
APUSYS_NOC_DAPC_AO[i].d1_permission);
ret += set_slave_noc_dapc(index, DOMAIN_2,
APUSYS_NOC_DAPC_AO[i].d2_permission);
ret += set_slave_noc_dapc(index, DOMAIN_3,
APUSYS_NOC_DAPC_AO[i].d3_permission);
ret += set_slave_noc_dapc(index, DOMAIN_4,
APUSYS_NOC_DAPC_AO[i].d4_permission);
ret += set_slave_noc_dapc(index, DOMAIN_5,
APUSYS_NOC_DAPC_AO[i].d5_permission);
ret += set_slave_noc_dapc(index, DOMAIN_6,
APUSYS_NOC_DAPC_AO[i].d6_permission);
ret += set_slave_noc_dapc(index, DOMAIN_7,
APUSYS_NOC_DAPC_AO[i].d7_permission);
ret += set_slave_noc_dapc(index, DOMAIN_8,
APUSYS_NOC_DAPC_AO[i].d8_permission);
ret += set_slave_noc_dapc(index, DOMAIN_9,
APUSYS_NOC_DAPC_AO[i].d9_permission);
ret += set_slave_noc_dapc(index, DOMAIN_10,
APUSYS_NOC_DAPC_AO[i].d10_permission);
ret += set_slave_noc_dapc(index, DOMAIN_11,
APUSYS_NOC_DAPC_AO[i].d11_permission);
ret += set_slave_noc_dapc(index, DOMAIN_12,
APUSYS_NOC_DAPC_AO[i].d12_permission);
ret += set_slave_noc_dapc(index, DOMAIN_13,
APUSYS_NOC_DAPC_AO[i].d13_permission);
ret += set_slave_noc_dapc(index, DOMAIN_14,
APUSYS_NOC_DAPC_AO[i].d14_permission);
ret += set_slave_noc_dapc(index, DOMAIN_15,
APUSYS_NOC_DAPC_AO[i].d15_permission);
}
return ret;
}
static int32_t set_apusys_ao_apc(void)
{
int32_t ret = 0;
uint32_t i;
for (i = 0U; i < ARRAY_SIZE(APUSYS_AO_Devices); i++) {
ret += set_slave_apc(i, DOMAIN_0,
APUSYS_AO_Devices[i].d0_permission);
ret += set_slave_apc(i, DOMAIN_1,
APUSYS_AO_Devices[i].d1_permission);
ret += set_slave_apc(i, DOMAIN_2,
APUSYS_AO_Devices[i].d2_permission);
ret += set_slave_apc(i, DOMAIN_3,
APUSYS_AO_Devices[i].d3_permission);
ret += set_slave_apc(i, DOMAIN_4,
APUSYS_AO_Devices[i].d4_permission);
ret += set_slave_apc(i, DOMAIN_5,
APUSYS_AO_Devices[i].d5_permission);
ret += set_slave_apc(i, DOMAIN_6,
APUSYS_AO_Devices[i].d6_permission);
ret += set_slave_apc(i, DOMAIN_7,
APUSYS_AO_Devices[i].d7_permission);
ret += set_slave_apc(i, DOMAIN_8,
APUSYS_AO_Devices[i].d8_permission);
ret += set_slave_apc(i, DOMAIN_9,
APUSYS_AO_Devices[i].d9_permission);
ret += set_slave_apc(i, DOMAIN_10,
APUSYS_AO_Devices[i].d10_permission);
ret += set_slave_apc(i, DOMAIN_11,
APUSYS_AO_Devices[i].d11_permission);
ret += set_slave_apc(i, DOMAIN_12,
APUSYS_AO_Devices[i].d12_permission);
ret += set_slave_apc(i, DOMAIN_13,
APUSYS_AO_Devices[i].d13_permission);
ret += set_slave_apc(i, DOMAIN_14,
APUSYS_AO_Devices[i].d14_permission);
ret += set_slave_apc(i, DOMAIN_15,
APUSYS_AO_Devices[i].d15_permission);
}
return ret;
}
static void set_apusys_apc_lock(void)
{
uint32_t set_bit = 1U << APUSYS_APC_SYS0_LOCK_BIT_APU_SCTRL_REVISER;
/* Lock apu_sctrl_reviser */
set_bit = set_bit | (1U << APUSYS_APC_SYS0_LOCK_BIT_APUSYS_AO_5);
apuapc_writel(set_bit, APUSYS_SYS0_APC_LOCK_0);
}
void set_apusys_apc(void)
{
int32_t ret = 0;
/* Check violation status */
INFO("[APUAPC] vio %d\n", apuapc_readl(APUSYS_APC_CON) & 0x80000000);
/* Initial Permission */
ret = set_apusys_ao_apc();
INFO("[APUAPC] %s - %s!\n", "set_apusys_ao_apc",
ret ? "FAILED" : "SUCCESS");
/* Lock */
set_apusys_apc_lock();
/* Initial NoC Permission */
ret = set_apusys_noc_dapc();
INFO("[APUAPC] %s - %s!\n", "set_apusys_noc_dapc",
ret ? "FAILED" : "SUCCESS");
/* Dump Permission */
dump_apusys_ao_apc();
dump_apusys_noc_dapc();
INFO("[APUAPC] %s done\n", __func__);
}
plat/mediatek/mt8192/drivers/apusys/mtk_apusys_apc.h 0 → 100644
View file @ f46e1f18
/*
* Copyright (c) 2021, MediaTek Inc. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef __MTK_APUSYS_APC_H__
#define __MTK_APUSYS_APC_H__
void set_apusys_apc(void);
#endif /* __MTK_APUSYS_APC_H__ */
plat/mediatek/mt8192/drivers/apusys/mtk_apusys_apc_def.h 0 → 100644
View file @ f46e1f18
/*
* Copyright (c) 2021, MediaTek Inc. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef __MTK_APUSYS_APC_DEF_H__
#define __MTK_APUSYS_APC_DEF_H__
#include <lib/mmio.h>
enum APUSYS_APC_ERR_STATUS {
APUSYS_APC_OK = 0x0,
APUSYS_APC_ERR_GENERIC = 0x1000,
APUSYS_APC_ERR_INVALID_CMD = 0x1001,
APUSYS_APC_ERR_SLAVE_TYPE_NOT_SUPPORTED = 0x1002,
APUSYS_APC_ERR_SLAVE_IDX_NOT_SUPPORTED = 0x1003,
APUSYS_APC_ERR_DOMAIN_NOT_SUPPORTED = 0x1004,
APUSYS_APC_ERR_PERMISSION_NOT_SUPPORTED = 0x1005,
APUSYS_APC_ERR_OUT_OF_BOUNDARY = 0x1006,
APUSYS_APC_ERR_REQ_TYPE_NOT_SUPPORTED = 0x1007,
};
enum APUSYS_APC_PERM_TYPE {
NO_PROTECTION = 0U,
SEC_RW_ONLY = 1U,
SEC_RW_NS_R = 2U,
FORBIDDEN = 3U,
PERM_NUM = 4U,
};
enum APUSYS_APC_DOMAIN_ID {
DOMAIN_0 = 0U,
DOMAIN_1 = 1U,
DOMAIN_2 = 2U,
DOMAIN_3 = 3U,
DOMAIN_4 = 4U,
DOMAIN_5 = 5U,
DOMAIN_6 = 6U,
DOMAIN_7 = 7U,
DOMAIN_8 = 8U,
DOMAIN_9 = 9U,
DOMAIN_10 = 10U,
DOMAIN_11 = 11U,
DOMAIN_12 = 12U,
DOMAIN_13 = 13U,
DOMAIN_14 = 14U,
DOMAIN_15 = 15U,
};
struct APC_DOM_16 {
unsigned char d0_permission;
unsigned char d1_permission;
unsigned char d2_permission;
unsigned char d3_permission;
unsigned char d4_permission;
unsigned char d5_permission;
unsigned char d6_permission;
unsigned char d7_permission;
unsigned char d8_permission;
unsigned char d9_permission;
unsigned char d10_permission;
unsigned char d11_permission;
unsigned char d12_permission;
unsigned char d13_permission;
unsigned char d14_permission;
unsigned char d15_permission;
};
#define APUSYS_APC_AO_ATTR(DEV_NAME, PERM_ATTR0, PERM_ATTR1, \
PERM_ATTR2, PERM_ATTR3, PERM_ATTR4, PERM_ATTR5, \
PERM_ATTR6, PERM_ATTR7, PERM_ATTR8, PERM_ATTR9, \
PERM_ATTR10, PERM_ATTR11, PERM_ATTR12, PERM_ATTR13, \
PERM_ATTR14, PERM_ATTR15) \
{(unsigned char)PERM_ATTR0, (unsigned char)PERM_ATTR1, \
(unsigned char)PERM_ATTR2, (unsigned char)PERM_ATTR3, \
(unsigned char)PERM_ATTR4, (unsigned char)PERM_ATTR5, \
(unsigned char)PERM_ATTR6, (unsigned char)PERM_ATTR7, \
(unsigned char)PERM_ATTR8, (unsigned char)PERM_ATTR9, \
(unsigned char)PERM_ATTR10, (unsigned char)PERM_ATTR11, \
(unsigned char)PERM_ATTR12, (unsigned char)PERM_ATTR13, \
(unsigned char)PERM_ATTR14, (unsigned char)PERM_ATTR15}
#define apuapc_writel(VAL, REG) mmio_write_32((uintptr_t)REG, VAL)
#define apuapc_readl(REG) mmio_read_32((uintptr_t)REG)
/* APUSYS APC AO Registers */
#define APUSYS_APC_AO_BASE APUSYS_APC_AO_WRAPPER_BASE
#define APUSYS_APC_CON (APUSYS_APC_AO_BASE + 0x00F00)
#define APUSYS_SYS0_APC_LOCK_0 (APUSYS_APC_AO_BASE + 0x00700)
/* APUSYS NOC_DPAC_AO Registers */
#define APUSYS_NOC_DAPC_CON (APUSYS_NOC_DAPC_AO_BASE + 0x00F00)
#define APUSYS_NOC_DAPC_GAP_BOUNDARY 4U
#define APUSYS_NOC_DAPC_JUMP_GAP 12U
#define APUSYS_APC_SYS0_AO_SLAVE_NUM_IN_1_DOM 16U
#define APUSYS_APC_SYS0_AO_DOM_NUM 16U
#define APUSYS_APC_SYS0_AO_SLAVE_NUM 59U
#define APUSYS_APC_SYS0_LOCK_BIT_APU_SCTRL_REVISER 11U
#define APUSYS_APC_SYS0_LOCK_BIT_APUSYS_AO_5 5U
#define APUSYS_NOC_DAPC_AO_SLAVE_NUM_IN_1_DOM 16U
#define APUSYS_NOC_DAPC_AO_DOM_NUM 16U
#define APUSYS_NOC_DAPC_AO_SLAVE_NUM 27U
#endif /* __MTK_APUSYS_APC_DEF_H__ */
plat/mediatek/mt8192/drivers/devapc/devapc.c
View file @ f46e1f18
...@@ -9,6 +9,7 @@ ...@@ -9,6 +9,7 @@
#include <lib/mmio.h> #include <lib/mmio.h>
#include <devapc.h> #include <devapc.h>
#include <mtk_apusys_apc.h>
/* Infra_ao */ /* Infra_ao */
static const struct APC_INFRA_PERI_DOM_16 INFRA_AO_SYS0_Devices[] = { static const struct APC_INFRA_PERI_DOM_16 INFRA_AO_SYS0_Devices[] = {
...@@ -2839,5 +2840,8 @@ void devapc_init(void) ...@@ -2839,5 +2840,8 @@ void devapc_init(void)
dump_peri_ao2_apc(); dump_peri_ao2_apc();
dump_peri_par_ao_apc(); dump_peri_par_ao_apc();
/* Setup APUSYS Permission */
set_apusys_apc();
INFO("[DEVAPC] %s done\n", __func__); INFO("[DEVAPC] %s done\n", __func__);
} }
plat/mediatek/mt8192/platform.mk
View file @ f46e1f18
...@@ -64,6 +64,7 @@ BL31_SOURCES += common/desc_image_load.c \ ...@@ -64,6 +64,7 @@ BL31_SOURCES += common/desc_image_load.c \
${MTK_PLAT_SOC}/plat_topology.c \ ${MTK_PLAT_SOC}/plat_topology.c \
${MTK_PLAT_SOC}/plat_sip_calls.c \ ${MTK_PLAT_SOC}/plat_sip_calls.c \
${MTK_PLAT_SOC}/drivers/apusys/mtk_apusys.c \ ${MTK_PLAT_SOC}/drivers/apusys/mtk_apusys.c \
${MTK_PLAT_SOC}/drivers/apusys/mtk_apusys_apc.c \
${MTK_PLAT_SOC}/drivers/dcm/mtk_dcm.c \ ${MTK_PLAT_SOC}/drivers/dcm/mtk_dcm.c \
${MTK_PLAT_SOC}/drivers/dcm/mtk_dcm_utils.c \ ${MTK_PLAT_SOC}/drivers/dcm/mtk_dcm_utils.c \
${MTK_PLAT_SOC}/drivers/devapc/devapc.c \ ${MTK_PLAT_SOC}/drivers/devapc/devapc.c \
......
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