Merge changes from topic "raspberry-pi-4-support" into integration

* changes:
  Add fdt_add_reserved_memory() helper function
  qemu: Move and generalise FDT PSCI fixup

plat/qemu/dt.c → common/fdt_fixup.c

 /*
- * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
 
+/*
+ * Contains generic routines to fix up the device tree blob passed on to
+ * payloads like BL32 and BL33 (and further down the boot chain).
+ * This allows to easily add PSCI nodes, when the original DT does not have
+ * it or advertises another method.
+ * Also it supports to add reserved memory nodes to describe memory that
+ * is used by the secure world, so that non-secure software avoids using
+ * that.
+ */
+
 #include <string.h>
 
 #include <libfdt.h>
@@ -12,7 +22,7 @@
 #include <drivers/console.h>
 #include <lib/psci/psci.h>
 
-#include "qemu_private.h"
+#include <common/fdt_fixup.h>
 
 static int append_psci_compatible(void *fdt, int offs, const char *str)
 {
@@ -55,45 +65,92 @@ int dt_add_psci_node(void *fdt)
 	return 0;
 }
 
-static int check_node_compat_prefix(void *fdt, int offs, const char *prefix)
+/*
+ * Find the first subnode that has a "device_type" property with the value
+ * "cpu" and which's enable-method is not "psci" (yet).
+ * Returns 0 if no such subnode is found, so all have already been patched
+ * or none have to be patched in the first place.
+ * Returns 1 if *one* such subnode has been found and successfully changed
+ * to "psci".
+ * Returns -1 on error.
+ *
+ * Call in a loop until it returns 0. Recalculate the node offset after
+ * it has returned 1.
+ */
+static int dt_update_one_cpu_node(void *fdt, int offset)
 {
-	const size_t prefix_len = strlen(prefix);
-	size_t l;
-	int plen;
+	int offs;
+
+	/* Iterate over all subnodes to find those with device_type = "cpu". */
+	for (offs = fdt_first_subnode(fdt, offset); offs >= 0;
+	     offs = fdt_next_subnode(fdt, offs)) {
 		const char *prop;
+		int len;
 
-	prop = fdt_getprop(fdt, offs, "compatible", &plen);
+		prop = fdt_getprop(fdt, offs, "device_type", &len);
 		if (!prop)
-		return -1;
+			continue;
+		if (memcmp(prop, "cpu", 4) != 0 || len != 4)
+			continue;
 
-	while (plen > 0) {
-		if (memcmp(prop, prefix, prefix_len) == 0)
-			return 0; /* match */
+		/* Ignore any nodes which already use "psci". */
+		prop = fdt_getprop(fdt, offs, "enable-method", &len);
+		if (prop && memcmp(prop, "psci", 5) == 0 && len == 5)
+			continue;
 
-		l = strlen(prop) + 1;
-		prop += l;
-		plen -= l;
+		if (fdt_setprop_string(fdt, offs, "enable-method", "psci"))
+			return -1;
+		/*
+		 * Subnode found and patched.
+		 * Restart to accommodate potentially changed offsets.
+		 */
+		return 1;
 	}
 
-	return -1;
+	if (offs == -FDT_ERR_NOTFOUND)
+		return 0;
+
+	return offs;
 }
 
 int dt_add_psci_cpu_enable_methods(void *fdt)
 {
-	int offs = 0;
+	int offs, ret;
 
-	while (1) {
-		offs = fdt_next_node(fdt, offs, NULL);
+	do {
+		offs = fdt_path_offset(fdt, "/cpus");
 		if (offs < 0)
-			break;
-		if (fdt_getprop(fdt, offs, "enable-method", NULL))
-			continue; /* already set */
-		if (check_node_compat_prefix(fdt, offs, "arm,cortex-a"))
-			continue; /* no compatible */
-		if (fdt_setprop_string(fdt, offs, "enable-method", "psci"))
-			return -1;
-		/* Need to restart scanning as offsets may have changed */
-		offs = 0;
+			return offs;
+
+		ret = dt_update_one_cpu_node(fdt, offs);
+	} while (ret > 0);
+
+	return ret;
+}
+
+#define HIGH_BITS(x) ((sizeof(x) > 4) ? ((x) >> 32) : (typeof(x))0)
+
+int fdt_add_reserved_memory(void *dtb, const char *node_name,
+			    uintptr_t base, size_t size)
+{
+	int offs = fdt_path_offset(dtb, "/reserved-memory");
+	uint32_t addresses[3];
+
+	if (offs < 0) {			/* create if not existing yet */
+		offs = fdt_add_subnode(dtb, 0, "reserved-memory");
+		if (offs < 0)
+			return offs;
+		fdt_setprop_u32(dtb, offs, "#address-cells", 2);
+		fdt_setprop_u32(dtb, offs, "#size-cells", 1);
+		fdt_setprop(dtb, offs, "ranges", NULL, 0);
 	}
+
+	addresses[0] = cpu_to_fdt32(HIGH_BITS(base));
+	addresses[1] = cpu_to_fdt32(base & 0xffffffff);
+	addresses[2] = cpu_to_fdt32(size & 0xffffffff);
+	offs = fdt_add_subnode(dtb, offs, node_name);
+	fdt_setprop(dtb, offs, "no-map", NULL, 0);
+	fdt_setprop(dtb, offs, "reg", addresses, 12);
+
 	return 0;
 }

include/common/fdt_fixup.h

+/*
+ * Copyright (c) 2019, ARM Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef FDT_FIXUP_H
+#define FDT_FIXUP_H
+
+int dt_add_psci_node(void *fdt);
+int dt_add_psci_cpu_enable_methods(void *fdt);
+int fdt_add_reserved_memory(void *dtb, const char *node_name,
+			    uintptr_t base, size_t size);
+
+#endif /* FDT_FIXUP_H */

plat/qemu/platform.mk

@@ -114,7 +114,7 @@ BL2_SOURCES		+=	drivers/io/io_semihosting.c		\
 				plat/qemu/qemu_io_storage.c		\
 				plat/qemu/${ARCH}/plat_helpers.S	\
 				plat/qemu/qemu_bl2_setup.c		\
-				plat/qemu/dt.c				\
+				common/fdt_fixup.c			\
 				plat/qemu/qemu_bl2_mem_params_desc.c	\
 				plat/qemu/qemu_image_load.c		\
 				common/desc_image_load.c

plat/qemu/qemu_bl2_setup.c

 /*
- * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
@@ -15,6 +15,7 @@
 #include <common/bl_common.h>
 #include <common/debug.h>
 #include <common/desc_image_load.h>
+#include <common/fdt_fixup.h>
 #include <lib/optee_utils.h>
 #include <lib/utils.h>
 #include <plat/common/platform.h>

plat/qemu/qemu_private.h

@@ -28,9 +28,6 @@ void qemu_configure_mmu_el3(unsigned long total_base, unsigned long total_size,
 void plat_qemu_io_setup(void);
 unsigned int plat_qemu_calc_core_pos(u_register_t mpidr);
 
-int dt_add_psci_node(void *fdt);
-int dt_add_psci_cpu_enable_methods(void *fdt);
-
 void qemu_console_init(void);
 
 void plat_qemu_gic_init(void);