diff --git a/drivers/arm/pl061/pl061_gpio.c b/drivers/arm/pl061/pl061_gpio.c index fca00565d094904d6004d475e66b48ca7f3c2ca5..327c68e11eae6a010b3a1f9ef004914c0e573878 100644 --- a/drivers/arm/pl061/pl061_gpio.c +++ b/drivers/arm/pl061/pl061_gpio.c @@ -39,6 +39,7 @@ #include <gpio.h> #include <mmio.h> #include <pl061_gpio.h> +#include <utils.h> #if !PLAT_PL061_MAX_GPIOS # define PLAT_PL061_MAX_GPIOS 32 @@ -52,7 +53,6 @@ CASSERT(PLAT_PL061_MAX_GPIOS > 0, assert_plat_pl061_max_gpios); #define PL061_GPIO_DIR 0x400 #define GPIOS_PER_PL061 8 -#define BIT(nr) (1UL << (nr)) static int pl061_get_direction(int gpio); static void pl061_set_direction(int gpio, int direction); diff --git a/include/lib/utils.h b/include/lib/utils.h index a234e3c9a69659f76f73fa55bbb02f14a41c2e3e..f7af8f66c008fd28e82c1556590fc7b4d9b9aaeb 100644 --- a/include/lib/utils.h +++ b/include/lib/utils.h @@ -40,6 +40,8 @@ #define SIZE_FROM_LOG2_WORDS(n) (4 << (n)) +#define BIT(nr) (1UL << (nr)) + /* * The round_up() macro rounds up a value to the given boundary in a * type-agnostic yet type-safe manner. The boundary must be a power of two. diff --git a/plat/rockchip/common/include/plat_private.h b/plat/rockchip/common/include/plat_private.h index a093e79225256a8c587b1f4dda1604b0bd2ba456..b2234a65023cbb9dbcfcedfd99508b383f4cd45a 100644 --- a/plat/rockchip/common/include/plat_private.h +++ b/plat/rockchip/common/include/plat_private.h @@ -75,10 +75,6 @@ struct rockchip_pm_ops_cb { ******************************************************************************/ #define REG_MSK_SHIFT 16 -#ifndef BIT -#define BIT(nr) (1 << (nr)) -#endif - #ifndef WMSK_BIT #define WMSK_BIT(nr) BIT((nr) + REG_MSK_SHIFT) #endif diff --git a/plat/rockchip/rk3399/drivers/soc/soc.h b/plat/rockchip/rk3399/drivers/soc/soc.h index 742bb7b7c63416f9dbbb6515d2f54313b51e8d70..28590f2b8e9c854f571e60fc3f5703366760b05e 100644 --- a/plat/rockchip/rk3399/drivers/soc/soc.h +++ b/plat/rockchip/rk3399/drivers/soc/soc.h @@ -31,6 +31,8 @@ #ifndef __SOC_H__ #define __SOC_H__ +#include <utils.h> + #define GLB_SRST_FST_CFG_VAL 0xfdb9 #define GLB_SRST_SND_CFG_VAL 0xeca8