From fcb52dbf16eaf509dbdc8c1c37c5b2bd819b0de5 Mon Sep 17 00:00:00 2001 From: Roberto Vargas <roberto.vargas@arm.com> Date: Mon, 13 Aug 2018 14:17:43 +0100 Subject: [PATCH] cci: Use dsb to wait before reading status register The CCI500 TRM explicitily requires completion of the write operation before the read operation, and it is not guaranteed by dmb but it is dsb. Change-Id: Ieeaa0d1a4b8fcb87108dea9b6de03d9c8a150829 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com> --- drivers/arm/cci/cci.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/arm/cci/cci.c b/drivers/arm/cci/cci.c index 71b65f42c..a6ee77a50 100644 --- a/drivers/arm/cci/cci.c +++ b/drivers/arm/cci/cci.c @@ -147,7 +147,7 @@ void cci_enable_snoop_dvm_reqs(unsigned int master_id) * Wait for the completion of the write to the Snoop Control Register * before testing the change_pending bit */ - dmbish(); + dsbish(); /* Wait for the dust to settle down */ while (mmio_read_32(cci_base + STATUS_REG) & CHANGE_PENDING_BIT) @@ -174,7 +174,7 @@ void cci_disable_snoop_dvm_reqs(unsigned int master_id) * Wait for the completion of the write to the Snoop Control Register * before testing the change_pending bit */ - dmbish(); + dsbish(); /* Wait for the dust to settle down */ while (mmio_read_32(cci_base + STATUS_REG) & CHANGE_PENDING_BIT) -- GitLab