From fdcc112797327fc46bfad5d4753faf8f887f505d Mon Sep 17 00:00:00 2001
From: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Date: Mon, 24 Sep 2018 17:16:05 +0100
Subject: [PATCH] tegra: Migrate to new interfaces
- Migrate to bl31_early_platform_setup2().
- Remove references to removed build options.
- Replace zeromem16() by zeromem().
- Use private definition of bl31_params_t.
This is an incomplete migration, the platform doesn't currently compile.
Change-Id: I67fbf2206678be80c3a16692024221a131cec42f
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
---
plat/nvidia/tegra/common/tegra_bl31_setup.c | 38 ++++++++++-----------
plat/nvidia/tegra/common/tegra_common.mk | 5 ++-
plat/nvidia/tegra/common/tegra_fiq_glue.c | 1 -
plat/nvidia/tegra/common/tegra_gic.c | 11 ------
plat/nvidia/tegra/include/plat_macros.S | 1 -
plat/nvidia/tegra/include/tegra_private.h | 14 +++++++-
plat/nvidia/tegra/platform.mk | 3 --
plat/nvidia/tegra/soc/t186/plat_setup.c | 4 +--
8 files changed, 36 insertions(+), 41 deletions(-)
diff --git a/plat/nvidia/tegra/common/tegra_bl31_setup.c b/plat/nvidia/tegra/common/tegra_bl31_setup.c
index 65997687f..9410d44fc 100644
--- a/plat/nvidia/tegra/common/tegra_bl31_setup.c
+++ b/plat/nvidia/tegra/common/tegra_bl31_setup.c
@@ -23,13 +23,13 @@
#include <string.h>
#include <tegra_def.h>
#include <tegra_private.h>
+#include <utils.h>
#include <utils_def.h>
/* length of Trusty's input parameters (in bytes) */
#define TRUSTY_PARAMS_LEN_BYTES (4096*2)
extern void memcpy16(void *dest, const void *src, unsigned int length);
-extern void zeromem16(void *mem, unsigned int length);
/*******************************************************************************
* Declarations of linker defined symbols which will help us find the layout
@@ -72,7 +72,7 @@ void plat_early_platform_setup(void)
; /* do nothing */
}
-bl31_params_t *plat_get_bl31_params(void)
+struct tegra_bl31_params *plat_get_bl31_params(void)
{
return NULL;
}
@@ -112,11 +112,11 @@ plat_params_from_bl2_t *bl31_get_plat_params(void)
* Perform any BL31 specific platform actions. Populate the BL33 and BL32 image
* info.
******************************************************************************/
-void bl31_early_platform_setup(bl31_params_t *from_bl2,
- void *plat_params_from_bl2)
+void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
+ u_register_t arg2, u_register_t arg3)
{
- plat_params_from_bl2_t *plat_params =
- (plat_params_from_bl2_t *)plat_params_from_bl2;
+ struct tegra_bl31_params *arg_from_bl2 = (struct tegra_bl31_params *) arg0;
+ plat_params_from_bl2_t *plat_params = (plat_params_from_bl2_t *)arg1;
image_info_t bl32_img_info = { {0} };
uint64_t tzdram_start, tzdram_end, bl32_start, bl32_end;
@@ -126,8 +126,8 @@ void bl31_early_platform_setup(bl31_params_t *from_bl2,
* might use custom ways to get arguments, so provide handlers which
* they can override.
*/
- if (from_bl2 == NULL)
- from_bl2 = plat_get_bl31_params();
+ if (arg_from_bl2 == NULL)
+ arg_from_bl2 = plat_get_bl31_params();
if (plat_params == NULL)
plat_params = plat_get_bl31_plat_params();
@@ -135,14 +135,14 @@ void bl31_early_platform_setup(bl31_params_t *from_bl2,
* Copy BL3-3, BL3-2 entry point information.
* They are stored in Secure RAM, in BL2's address space.
*/
- assert(from_bl2);
- assert(from_bl2->bl33_ep_info);
- bl33_image_ep_info = *from_bl2->bl33_ep_info;
-
- if (from_bl2->bl32_ep_info) {
- bl32_image_ep_info = *from_bl2->bl32_ep_info;
- bl32_mem_size = from_bl2->bl32_ep_info->args.arg0;
- bl32_boot_params = from_bl2->bl32_ep_info->args.arg2;
+ assert(arg_from_bl2);
+ assert(arg_from_bl2->bl33_ep_info);
+ bl33_image_ep_info = *arg_from_bl2->bl33_ep_info;
+
+ if (arg_from_bl2->bl32_ep_info) {
+ bl32_image_ep_info = *arg_from_bl2->bl32_ep_info;
+ bl32_mem_size = arg_from_bl2->bl32_ep_info->args.arg0;
+ bl32_boot_params = arg_from_bl2->bl32_ep_info->args.arg2;
}
/*
@@ -191,9 +191,9 @@ void bl31_early_platform_setup(bl31_params_t *from_bl2,
* inside the TZDRAM. We check the BL32 image info to find out
* the base/PC values and relocate the image if necessary.
*/
- if (from_bl2->bl32_image_info) {
+ if (arg_from_bl2->bl32_image_info) {
- bl32_img_info = *from_bl2->bl32_image_info;
+ bl32_img_info = *arg_from_bl2->bl32_image_info;
/* Relocate BL32 if it resides outside of the TZDRAM */
tzdram_start = plat_bl31_params_from_bl2.tzdram_base;
@@ -217,7 +217,7 @@ void bl31_early_platform_setup(bl31_params_t *from_bl2,
bl32_img_info.image_size);
/* clean up non-secure intermediate buffer */
- zeromem16((void *)(uintptr_t)bl32_start,
+ zeromem((void *)(uintptr_t)bl32_start,
bl32_img_info.image_size);
}
}
diff --git a/plat/nvidia/tegra/common/tegra_common.mk b/plat/nvidia/tegra/common/tegra_common.mk
index 8f6c7b836..abb9bb814 100644
--- a/plat/nvidia/tegra/common/tegra_common.mk
+++ b/plat/nvidia/tegra/common/tegra_common.mk
@@ -1,5 +1,5 @@
#
-# Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
+# Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
@@ -13,8 +13,7 @@ PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS}
COMMON_DIR := plat/nvidia/tegra/common
-BL31_SOURCES += drivers/arm/gic/gic_v2.c \
- drivers/console/aarch64/console.S \
+BL31_SOURCES += drivers/console/aarch64/console.S \
drivers/delay_timer/delay_timer.c \
drivers/ti/uart/aarch64/16550_console.S \
${COMMON_DIR}/aarch64/tegra_helpers.S \
diff --git a/plat/nvidia/tegra/common/tegra_fiq_glue.c b/plat/nvidia/tegra/common/tegra_fiq_glue.c
index 2f4395872..bc6d30546 100644
--- a/plat/nvidia/tegra/common/tegra_fiq_glue.c
+++ b/plat/nvidia/tegra/common/tegra_fiq_glue.c
@@ -12,7 +12,6 @@
#include <context_mgmt.h>
#include <debug.h>
#include <denver.h>
-#include <gic_v2.h>
#include <interrupt_mgmt.h>
#include <platform.h>
#include <tegra_def.h>
diff --git a/plat/nvidia/tegra/common/tegra_gic.c b/plat/nvidia/tegra/common/tegra_gic.c
index 3ace554db..c3dc5f65e 100644
--- a/plat/nvidia/tegra/common/tegra_gic.c
+++ b/plat/nvidia/tegra/common/tegra_gic.c
@@ -5,11 +5,9 @@
*/
#include <arch_helpers.h>
-#include <arm_gic.h>
#include <assert.h>
#include <bl_common.h>
#include <debug.h>
-#include <gic_v2.h>
#include <interrupt_mgmt.h>
#include <platform.h>
#include <stdint.h>
@@ -188,14 +186,9 @@ static uint32_t tegra_gic_interrupt_type_to_line(uint32_t type,
* both normal and secure worlds are using ARM GICv2. This parameter
* will be used when the secure world starts using GICv3.
*/
-#if ARM_GIC_ARCH == 2
return gicv2_interrupt_type_to_line(TEGRA_GICC_BASE, type);
-#else
-#error "Invalid ARM GIC architecture version specified for platform port"
-#endif /* ARM_GIC_ARCH */
}
-#if ARM_GIC_ARCH == 2
/*******************************************************************************
* This function returns the type of the highest priority pending interrupt at
* the GIC cpu interface. INTR_TYPE_INVAL is returned when there is no
@@ -296,10 +289,6 @@ static uint32_t tegra_gic_get_interrupt_type(uint32_t id)
return ret;
}
-#else
-#error "Invalid ARM GIC architecture version specified for platform port"
-#endif /* ARM_GIC_ARCH */
-
uint32_t plat_ic_get_pending_interrupt_id(void)
{
return tegra_gic_get_pending_interrupt_id();
diff --git a/plat/nvidia/tegra/include/plat_macros.S b/plat/nvidia/tegra/include/plat_macros.S
index f54e16864..caf114852 100644
--- a/plat/nvidia/tegra/include/plat_macros.S
+++ b/plat/nvidia/tegra/include/plat_macros.S
@@ -7,7 +7,6 @@
#ifndef __PLAT_MACROS_S__
#define __PLAT_MACROS_S__
-#include <gic_v2.h>
#include <tegra_def.h>
.section .rodata.gic_reg_name, "aS"
diff --git a/plat/nvidia/tegra/include/tegra_private.h b/plat/nvidia/tegra/include/tegra_private.h
index 7a0645562..b6f2df759 100644
--- a/plat/nvidia/tegra/include/tegra_private.h
+++ b/plat/nvidia/tegra/include/tegra_private.h
@@ -50,6 +50,18 @@ typedef struct irq_sec_cfg {
uint32_t type;
} irq_sec_cfg_t;
+/*******************************************************************************
+ * Struct describing parameters passed to bl31
+ ******************************************************************************/
+struct tegra_bl31_params {
+ param_header_t h;
+ image_info_t *bl31_image_info;
+ entry_point_info_t *bl32_ep_info;
+ image_info_t *bl32_image_info;
+ entry_point_info_t *bl33_ep_info;
+ image_info_t *bl33_image_info;
+};
+
/* Declarations for plat_psci_handlers.c */
int32_t tegra_soc_validate_power_state(unsigned int power_state,
psci_power_state_t *req_state);
@@ -58,7 +70,7 @@ int32_t tegra_soc_validate_power_state(unsigned int power_state,
const mmap_region_t *plat_get_mmio_map(void);
uint32_t plat_get_console_from_id(int id);
void plat_gic_setup(void);
-bl31_params_t *plat_get_bl31_params(void);
+struct tegra_bl31_params *plat_get_bl31_params(void);
plat_params_from_bl2_t *plat_get_bl31_plat_params(void);
/* Declarations for plat_secondary.c */
diff --git a/plat/nvidia/tegra/platform.mk b/plat/nvidia/tegra/platform.mk
index ad60620a4..33548b720 100644
--- a/plat/nvidia/tegra/platform.mk
+++ b/plat/nvidia/tegra/platform.mk
@@ -13,9 +13,6 @@ $(eval $(call add_define,CRASH_REPORTING))
# enable assert() for release/debug builds
ENABLE_ASSERTIONS := 1
-# Disable the PSCI platform compatibility layer
-ENABLE_PLAT_COMPAT := 0
-
# enable dynamic memory mapping
PLAT_XLAT_TABLES_DYNAMIC := 1
$(eval $(call add_define,PLAT_XLAT_TABLES_DYNAMIC))
diff --git a/plat/nvidia/tegra/soc/t186/plat_setup.c b/plat/nvidia/tegra/soc/t186/plat_setup.c
index fad6a59e2..233644b66 100644
--- a/plat/nvidia/tegra/soc/t186/plat_setup.c
+++ b/plat/nvidia/tegra/soc/t186/plat_setup.c
@@ -217,13 +217,13 @@ void plat_gic_setup(void)
/*******************************************************************************
* Return pointer to the BL31 params from previous bootloader
******************************************************************************/
-bl31_params_t *plat_get_bl31_params(void)
+struct tegra_bl31_params *plat_get_bl31_params(void)
{
uint32_t val;
val = mmio_read_32(TEGRA_SCRATCH_BASE + SECURE_SCRATCH_RSV53_LO);
- return (bl31_params_t *)(uintptr_t)val;
+ return (struct tegra_bl31_params *)(uintptr_t)val;
}
/*******************************************************************************
--
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