From fe5d5bbfe6bd0f386f92bdc419a7e04d885d5b43 Mon Sep 17 00:00:00 2001 From: Aditya Angadi Date: Sat, 20 Mar 2021 12:15:04 +0530 Subject: [PATCH] feat(board/rdn2): add support for variant 1 of rd-n2 platform Add board support for RD-N2 Cfg1 variant of RD-N2 platform. It is a variant of RD-N2 platform with a reduced interconnect mesh size (3x3) and core count (8-cores). Its platform variant id is 1. Change-Id: I34ad35c5a5c1e9b69a658fb92ed00e5bc5fe72f3 Signed-off-by: Aditya Angadi --- plat/arm/board/rdn2/include/platform_def.h | 15 +++++++++++++++ plat/arm/board/rdn2/platform.mk | 8 +++++--- plat/arm/board/rdn2/rdn2_topology.c | 4 ++++ plat/arm/css/sgi/include/sgi_variant.h | 3 +++ plat/arm/css/sgi/sgi_bl31_setup.c | 3 ++- 5 files changed, 29 insertions(+), 4 deletions(-) diff --git a/plat/arm/board/rdn2/include/platform_def.h b/plat/arm/board/rdn2/include/platform_def.h index 3f753f73f..30a0c5c26 100644 --- a/plat/arm/board/rdn2/include/platform_def.h +++ b/plat/arm/board/rdn2/include/platform_def.h @@ -11,7 +11,12 @@ #include +#if (CSS_SGI_PLATFORM_VARIANT == 1) +#define PLAT_ARM_CLUSTER_COUNT U(8) +#else #define PLAT_ARM_CLUSTER_COUNT U(16) +#endif + #define CSS_SGI_MAX_CPUS_PER_CLUSTER U(1) #define CSS_SGI_MAX_PE_PER_CPU U(1) @@ -26,7 +31,12 @@ #define PLAT_ARM_TZC_FILTERS TZC_400_REGION_ATTR_FILTER_BIT(0) #define TZC400_OFFSET UL(0x1000000) + +#if (CSS_SGI_PLATFORM_VARIANT == 1) +#define TZC400_COUNT U(2) +#else #define TZC400_COUNT U(8) +#endif #define TZC400_BASE(n) (PLAT_ARM_TZC_BASE + \ (n * TZC400_OFFSET)) @@ -60,6 +70,11 @@ /* GIC related constants */ #define PLAT_ARM_GICD_BASE UL(0x30000000) #define PLAT_ARM_GICC_BASE UL(0x2C000000) + +#if (CSS_SGI_PLATFORM_VARIANT == 1) +#define PLAT_ARM_GICR_BASE UL(0x30100000) +#else #define PLAT_ARM_GICR_BASE UL(0x301C0000) +#endif #endif /* PLATFORM_DEF_H */ diff --git a/plat/arm/board/rdn2/platform.mk b/plat/arm/board/rdn2/platform.mk index bd50fa29b..794f8974f 100644 --- a/plat/arm/board/rdn2/platform.mk +++ b/plat/arm/board/rdn2/platform.mk @@ -59,7 +59,9 @@ $(eval $(call TOOL_ADD_PAYLOAD,${NT_FW_CONFIG},--nt-fw-config)) override CTX_INCLUDE_AARCH32_REGS := 0 override ENABLE_AMU := 1 -ifneq ($(CSS_SGI_PLATFORM_VARIANT),0) - $(error "CSS_SGI_PLATFORM_VARIANT for RD-N2 should be 0, currently set to \ - ${CSS_SGI_PLATFORM_VARIANT}.") +RD_N2_VARIANTS := 0 1 +ifneq ($(CSS_SGI_PLATFORM_VARIANT),\ + $(filter $(CSS_SGI_PLATFORM_VARIANT),$(RD_N2_VARIANTS))) + $(error "CSS_SGI_PLATFORM_VARIANT for RD-N2 should be 0 or 1, currently set \ + to ${CSS_SGI_PLATFORM_VARIANT}.") endif diff --git a/plat/arm/board/rdn2/rdn2_topology.c b/plat/arm/board/rdn2/rdn2_topology.c index 5c2e287cb..cad6c3704 100644 --- a/plat/arm/board/rdn2/rdn2_topology.c +++ b/plat/arm/board/rdn2/rdn2_topology.c @@ -20,6 +20,7 @@ const unsigned char rd_n2_pd_tree_desc[] = { CSS_SGI_MAX_CPUS_PER_CLUSTER, CSS_SGI_MAX_CPUS_PER_CLUSTER, CSS_SGI_MAX_CPUS_PER_CLUSTER, +#if (CSS_SGI_PLATFORM_VARIANT == 0) CSS_SGI_MAX_CPUS_PER_CLUSTER, CSS_SGI_MAX_CPUS_PER_CLUSTER, CSS_SGI_MAX_CPUS_PER_CLUSTER, @@ -28,6 +29,7 @@ const unsigned char rd_n2_pd_tree_desc[] = { CSS_SGI_MAX_CPUS_PER_CLUSTER, CSS_SGI_MAX_CPUS_PER_CLUSTER, CSS_SGI_MAX_CPUS_PER_CLUSTER, +#endif }; /******************************************************************************* @@ -51,6 +53,7 @@ const uint32_t plat_css_core_pos_to_scmi_dmn_id_map[] = { (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x5)), (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x6)), (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x7)), +#if (CSS_SGI_PLATFORM_VARIANT == 0) (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x8)), (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0x9)), (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0xA)), @@ -59,4 +62,5 @@ const uint32_t plat_css_core_pos_to_scmi_dmn_id_map[] = { (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0xD)), (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0xE)), (SET_SCMI_CHANNEL_ID(0x0) | SET_SCMI_DOMAIN_ID(0xF)), +#endif }; diff --git a/plat/arm/css/sgi/include/sgi_variant.h b/plat/arm/css/sgi/include/sgi_variant.h index ecf6d93d6..0062b973a 100644 --- a/plat/arm/css/sgi/include/sgi_variant.h +++ b/plat/arm/css/sgi/include/sgi_variant.h @@ -20,6 +20,9 @@ /* SID Version values for RD-N2 */ #define RD_N2_SID_VER_PART_NUM 0x07B7 +/* SID Version values for RD-N2 variants */ +#define RD_N2_CFG1_SID_VER_PART_NUM 0x07B6 + /* Structure containing SGI platform variant information */ typedef struct sgi_platform_info { unsigned int platform_id; /* Part Number of the platform */ diff --git a/plat/arm/css/sgi/sgi_bl31_setup.c b/plat/arm/css/sgi/sgi_bl31_setup.c index e8238ba7c..541689bc8 100644 --- a/plat/arm/css/sgi/sgi_bl31_setup.c +++ b/plat/arm/css/sgi/sgi_bl31_setup.c @@ -75,7 +75,8 @@ scmi_channel_plat_info_t *plat_css_get_scmi_info(int channel_id) { if (sgi_plat_info.platform_id == RD_N1E1_EDGE_SID_VER_PART_NUM || sgi_plat_info.platform_id == RD_V1_SID_VER_PART_NUM || - sgi_plat_info.platform_id == RD_N2_SID_VER_PART_NUM) { + sgi_plat_info.platform_id == RD_N2_SID_VER_PART_NUM || + sgi_plat_info.platform_id == RD_N2_CFG1_SID_VER_PART_NUM) { if (channel_id >= ARRAY_SIZE(plat_rd_scmi_info)) panic(); return &plat_rd_scmi_info[channel_id]; -- GitLab