From ff180993af519c2a7063c37ed12975c287c8c8e8 Mon Sep 17 00:00:00 2001
From: "Andrew F. Davis" <afd@ti.com>
Date: Thu, 25 Apr 2019 13:57:02 -0400
Subject: [PATCH] ti: k3: common: Mark sections for AM65x coherency workaround
These sections of code are only needed for the coherency workaround
used for AM65x, if this workaround is not needed then this code
is not either. Mark it off to keep it separated from the rest of
the PSCI implementation.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Change-Id: I113ca6a2a1f7881814ab0a64e5bac57139bc03ef
---
plat/ti/k3/common/k3_psci.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/plat/ti/k3/common/k3_psci.c b/plat/ti/k3/common/k3_psci.c
index cd42e7a0a..c7754e994 100644
--- a/plat/ti/k3/common/k3_psci.c
+++ b/plat/ti/k3/common/k3_psci.c
@@ -17,8 +17,10 @@
#include <k3_gicv3.h>
#include <ti_sci.h>
+#ifdef TI_AM65X_WORKAROUND
/* Need to flush psci internal locks before shutdown or their values are lost */
#include "../../../../lib/psci/psci_private.h"
+#endif
uintptr_t k3_sec_entrypoint;
@@ -113,6 +115,7 @@ void k3_pwr_domain_on_finish(const psci_power_state_t *target_state)
k3_gic_cpuif_enable();
}
+#ifdef TI_AM65X_WORKAROUND
static void __dead2 k3_pwr_domain_pwr_down_wfi(const psci_power_state_t
*target_state)
{
@@ -120,6 +123,7 @@ static void __dead2 k3_pwr_domain_pwr_down_wfi(const psci_power_state_t
flush_dcache_range((uintptr_t) psci_locks, sizeof(psci_locks));
psci_power_down_wfi();
}
+#endif
static void __dead2 k3_system_reset(void)
{
@@ -150,7 +154,9 @@ static const plat_psci_ops_t k3_plat_psci_ops = {
.pwr_domain_on = k3_pwr_domain_on,
.pwr_domain_off = k3_pwr_domain_off,
.pwr_domain_on_finish = k3_pwr_domain_on_finish,
+#ifdef TI_AM65X_WORKAROUND
.pwr_domain_pwr_down_wfi = k3_pwr_domain_pwr_down_wfi,
+#endif
.system_reset = k3_system_reset,
.validate_power_state = k3_validate_power_state,
.validate_ns_entrypoint = k3_validate_ns_entrypoint
--
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