1. 15 Aug, 2014 1 commit
    • Achin Gupta's avatar
      Unmask SError interrupt and clear SCR_EL3.EA bit · 0c8d4fef
      Achin Gupta authored
      This patch disables routing of external aborts from lower exception levels to
      EL3 and ensures that a SError interrupt generated as a result of execution in
      EL3 is taken locally instead of a lower exception level.
      
      The SError interrupt is enabled in the TSP code only when the operation has not
      been directly initiated by the normal world. This is to prevent the possibility
      of an asynchronous external abort which originated in normal world from being
      taken when execution is in S-EL1.
      
      Fixes ARM-software/tf-issues#153
      
      Change-Id: I157b996c75996d12fd86d27e98bc73dd8bce6cd5
      0c8d4fef
  2. 22 May, 2014 2 commits
    • Vikram Kanigiri's avatar
      Populate BL31 input parameters as per new spec · 4112bfa0
      Vikram Kanigiri authored
      This patch is based on spec published at
      https://github.com/ARM-software/tf-issues/issues/133
      
      It rearranges the bl31_args struct into
      bl31_params and bl31_plat_params which provide the
      information needed for Trusted firmware and platform
      specific data via x0 and x1
      
      On the FVP platform BL3-1 params and BL3-1 plat params
      and its constituents are stored at the start of TZDRAM.
      
      The information about memory availability and size for
      BL3-1, BL3-2 and BL3-3 is moved into platform specific data.
      
      Change-Id: I8b32057a3d0dd3968ea26c2541a0714177820da9
      4112bfa0
    • Vikram Kanigiri's avatar
      Rework handover interface between BL stages · 29fb905d
      Vikram Kanigiri authored
      This patch reworks the handover interface from: BL1 to BL2 and
      BL2 to BL3-1. It removes the raise_el(), change_el(), drop_el()
      and run_image() functions as they catered for code paths that were
      never exercised.
      BL1 calls bl1_run_bl2() to jump into BL2 instead of doing the same
      by calling run_image(). Similarly, BL2 issues the SMC to transfer
      execution to BL3-1 through BL1 directly. Only x0 and x1 are used
      to pass arguments to BL31. These arguments and parameters for
      running BL3-1 are passed through a reference to a
      'el_change_info_t' structure. They were being passed value in
      general purpose registers earlier.
      
      Change-Id: Id4fd019a19a9595de063766d4a66295a2c9307e1
      29fb905d
  3. 07 May, 2014 3 commits
    • Andrew Thoelke's avatar
      Access system registers directly in assembler · 7935d0a5
      Andrew Thoelke authored
      Instead of using the system register helper functions to read
      or write system registers, assembler coded functions should
      use MRS/MSR instructions. This results in faster and more
      compact code.
      
      This change replaces all usage of the helper functions with
      direct register accesses.
      
      Change-Id: I791d5f11f257010bb3e6a72c6c5ab8779f1982b3
      7935d0a5
    • Andrew Thoelke's avatar
      Replace disable_mmu with assembler version · 2f5dcfef
      Andrew Thoelke authored
      disable_mmu() cannot work as a C function as there is no control
      over data accesses generated by the compiler between disabling and
      cleaning the data cache. This results in reading stale data from
      main memory.
      
      As assembler version is provided for EL3, and a variant that also
      disables the instruction cache which is now used by the BL1
      exception handling function.
      
      Fixes ARM-software/tf-issues#147
      
      Change-Id: I0cf394d2579a125a23c2f2989c2e92ace6ddb1a6
      2f5dcfef
    • Andrew Thoelke's avatar
      Correct usage of data and instruction barriers · 8cec598b
      Andrew Thoelke authored
      The current code does not always use data and instruction
      barriers as required by the architecture and frequently uses
      barriers excessively due to their inclusion in all of the
      write_*() helper functions.
      
      Barriers should be used explicitly in assembler or C code
      when modifying processor state that requires the barriers in
      order to enable review of correctness of the code.
      
      This patch removes the barriers from the helper functions and
      introduces them as necessary elsewhere in the code.
      
      PORTING NOTE: check any port of Trusted Firmware for use of
      system register helper functions for reliance on the previous
      barrier behaviour and add explicit barriers as necessary.
      
      Fixes ARM-software/tf-issues#92
      
      Change-Id: Ie63e187404ff10e0bdcb39292dd9066cb84c53bf
      8cec598b
  4. 06 May, 2014 1 commit
    • Dan Handley's avatar
      Reduce deep nesting of header files · 97043ac9
      Dan Handley authored
      Reduce the number of header files included from other header
      files as much as possible without splitting the files. Use forward
      declarations where possible. This allows removal of some unnecessary
      "#ifndef __ASSEMBLY__" statements.
      
      Also, review the .c and .S files for which header files really need
      including and reorder the #include statements alphabetically.
      
      Fixes ARM-software/tf-issues#31
      
      Change-Id: Iec92fb976334c77453e010b60bcf56f3be72bd3e
      97043ac9
  5. 26 Mar, 2014 2 commits
    • Andrew Thoelke's avatar
      Place assembler functions in separate sections · 0a30cf54
      Andrew Thoelke authored
      This extends the --gc-sections behaviour to the many assembler
      support functions in the firmware images by placing each function
      into its own code section. This is achieved by creating a 'func'
      macro used to declare each function label.
      
      Fixes ARM-software/tf-issues#80
      
      Change-Id: I301937b630add292d2dec6d2561a7fcfa6fec690
      0a30cf54
    • Sandrine Bailleux's avatar
      Separate out BL2, BL3-1 and BL3-2 early exception vectors from BL1 · 6c595b3d
      Sandrine Bailleux authored
      bl1/aarch64/early_exceptions.S used to be re-used by BL2, BL3-1 and
      BL3-2.  There was some early SMC handling code in there that was not
      required by the other bootloader stages.  Therefore this patch
      introduces an even simpler exception vector source file for BL2,
      BL3-1 and BL3-2.
      
      Fixes ARM-software/tf-issues#38
      
      Change-Id: I0244b80e9930b0f8035156a0bf91cc3e9a8f995d
      6c595b3d
  6. 21 Mar, 2014 1 commit
    • Vikram Kanigiri's avatar
      Remove partially qualified asm helper functions · 6ba0b6d6
      Vikram Kanigiri authored
      Each ARM Trusted Firmware image should know in which EL it is running
      and it should use the corresponding register directly instead of reading
      currentEL and knowing which asm register to read/write
      
      Change-Id: Ief35630190b6f07c8fbb7ba6cb20db308f002945
      6ba0b6d6
  7. 20 Feb, 2014 1 commit
    • Jeenu Viswambharan's avatar
      Add exception vector guards · a7934d69
      Jeenu Viswambharan authored
      This patch adds guards so that an exception vector exceeding 32
      instructions will generate a compile-time error. This keeps the
      exception handlers in check from spilling over.
      
      Change-Id: I7aa56dd0071a333664e2814c656d3896032046fe
      a7934d69
  8. 17 Feb, 2014 2 commits
    • Achin Gupta's avatar
      Setup VBAR_EL3 incrementally · b739f22a
      Achin Gupta authored
      This patch ensures that VBAR_EL3 points to the simple stack-less
      'early_exceptions' when the C runtime stack is not correctly setup to
      use the more complex 'runtime_exceptions'. It is initialised to
      'runtime_exceptions' once this is done.
      
      This patch also moves all exception vectors into a '.vectors' section
      and modifies linker scripts to place all such sections together. This
      will minimize space wastage from alignment restrictions.
      
      Change-Id: I8c3e596ea3412c8bd582af9e8d622bb1cb2e049d
      b739f22a
    • Jeenu Viswambharan's avatar
      Fix spilled-over BL1 exception vector · 65f0730b
      Jeenu Viswambharan authored
      The SynchronousExceptionA64 vector has gone beyond the 32-instruction
      limit for individual exception vector. This patch splits and relocates
      the exception handler so that it fits into the 32-instruction window.
      
      Change-Id: Ic60c4fc3f09a1cb071d63ff0e58353ecaecbb62f
      65f0730b
  9. 20 Jan, 2014 1 commit
    • Achin Gupta's avatar
      remove empty definition of display_boot_progress() · 5443f2be
      Achin Gupta authored
      This patch replaces the empty definition of display_boot_progress() in
      bl2_main.c with a weak definition. The former allowed bl2 to use the
      early_exceptions(). It is possible to do that with a simple weak
      definition as well.
      
      Change-Id: Idb3f425a5e265f3579b638e3d26bd8c9bb78f80d
      5443f2be
  10. 17 Jan, 2014 1 commit
  11. 05 Dec, 2013 1 commit
    • Dan Handley's avatar
      Enable third party contributions · ab2d31ed
      Dan Handley authored
      - Add instructions for contributing to ARM Trusted Firmware.
      
      - Update copyright text in all files to acknowledge contributors.
      
      Change-Id: I9311aac81b00c6c167d2f8c889aea403b84450e5
      ab2d31ed
  12. 25 Oct, 2013 1 commit