1. 02 Jul, 2019 8 commits
  2. 06 Jun, 2019 1 commit
  3. 28 May, 2019 1 commit
  4. 07 May, 2019 1 commit
  5. 18 Apr, 2019 1 commit
  6. 17 Apr, 2019 3 commits
  7. 08 Apr, 2019 1 commit
  8. 15 Mar, 2019 1 commit
  9. 14 Mar, 2019 1 commit
  10. 28 Feb, 2019 5 commits
  11. 26 Feb, 2019 3 commits
  12. 19 Feb, 2019 4 commits
  13. 14 Feb, 2019 1 commit
    • Antonio Nino Diaz's avatar
      Update macro to check need for CVE-2017-5715 mitigation · ff6f62e1
      Antonio Nino Diaz authored
      
      
      Armv8.5 introduces the field CSV2 to register ID_AA64PFR0_EL1. It can
      have the following 3 values:
      
      - 0: Branch targets trained in one hardware described context may affect
           speculative execution in a different hardware described context. In
           some CPUs it may be needed to apply mitigations.
      
      - 1: Branch targets trained in one hardware described context can only
           affect speculative execution in a different hardware described
           context in a hard-to-determine way. No mitigation required.
      
      - 2: Same as 1, but the device is also aware of SCXTNUM_ELx register
           contexts. The TF doesn't use the registers, so there is no
           difference with 1.
      
      The field CSV2 was originally introduced in the TRM of the Cortex-A76
      before the release of the Armv8.5 architecture. That TRM only mentions
      the meaning of values 0 and 1. Because of this, the code only checks if
      the field has value 1 to know whether to enable or disable the
      mitigations.
      
      This patch makes it aware of value 2 as well. Both values 1 and 2
      disable the mitigation, and 0 enables it.
      
      Change-Id: I5af33de25a0197c98173f52c6c8c77b51a51429f
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      ff6f62e1
  14. 11 Feb, 2019 2 commits
    • Antonio Nino Diaz's avatar
      cpus: Add casts to all definitions in CPU headers · 1a74e4a8
      Antonio Nino Diaz authored
      
      
      There are some incorrect casts and some missing casts in the headers.
      This patch fixes the ones that were 64-bit or 32-bit wide wrongly and
      adds casts where they were missing.
      
      Note that none of the changes of the patch actually changes the values
      of the definitions. This patch is just for correctness.
      
      Change-Id: Iad6458021bad521922ce4f91bafff38b116b49eb
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      1a74e4a8
    • Antonio Nino Diaz's avatar
      cpus: Fix some incorrect definitions in CPU headers · a69817ed
      Antonio Nino Diaz authored
      
      
      There are some values that should be 64-bit immediates but that resolve
      to 0 because the type of the value is 32-bit wide. This patch casts the
      expressions to 64-bit before the shift so that the definition has the
      correct value.
      
      The definitions are only used in assembly so far, so the code is not
      actually affected by this bug. The assembler treats all values as 64-bit
      values, so there are no overflows.
      
      Change-Id: I965e4be631c1d28787c0913661d224c82a6b9155
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      a69817ed
  15. 04 Jan, 2019 1 commit
    • Antonio Nino Diaz's avatar
      Sanitise includes across codebase · 09d40e0e
      Antonio Nino Diaz authored
      Enforce full include path for includes. Deprecate old paths.
      
      The following folders inside include/lib have been left unchanged:
      
      - include/lib/cpus/${ARCH}
      - include/lib/el3_runtime/${ARCH}
      
      The reason for this change is that having a global namespace for
      includes isn't a good idea. It defeats one of the advantages of having
      folders and it introduces problems that are sometimes subtle (because
      you may not know the header you are actually including if there are two
      of them).
      
      For example, this patch had to be created because two headers were
      called the same way: e0ea0928 ("Fix gpio includes of mt8173 platform
      to avoid collision."). More recently, this patch has had similar
      problems: 46f9b2c3 ("drivers: add tzc380 support").
      
      This problem was introduced in commit 4ecca339
      
       ("Move include and
      source files to logical locations"). At that time, there weren't too
      many headers so it wasn't a real issue. However, time has shown that
      this creates problems.
      
      Platforms that want to preserve the way they include headers may add the
      removed paths to PLAT_INCLUDES, but this is discouraged.
      
      Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      09d40e0e
  16. 08 Nov, 2018 1 commit
    • Antonio Nino Diaz's avatar
      Standardise header guards across codebase · c3cf06f1
      Antonio Nino Diaz authored
      
      
      All identifiers, regardless of use, that start with two underscores are
      reserved. This means they can't be used in header guards.
      
      The style that this project is now to use the full name of the file in
      capital letters followed by 'H'. For example, for a file called
      "uart_example.h", the header guard is UART_EXAMPLE_H.
      
      The exceptions are files that are imported from other projects:
      
      - CryptoCell driver
      - dt-bindings folders
      - zlib headers
      
      Change-Id: I50561bf6c88b491ec440d0c8385c74650f3c106e
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      c3cf06f1
  17. 29 Oct, 2018 3 commits
  18. 15 Oct, 2018 1 commit
  19. 28 Sep, 2018 1 commit