1. 18 May, 2018 1 commit
    • Soby Mathew's avatar
      FVP: Enable capability to disable auth via dynamic config · 6e79f9fd
      Soby Mathew authored
      
      
      This patch adds capability to FVP to disable authentication dynamically
      via the `disable_auth` property in TB_FW_CONFIG. Both BL1 and BL2 parses
      the TB_FW_CONFIG for the `disable_auth` property and invokes the
      `load_dyn_disable_auth()` API to disable authentication if the
      property is set to 1. The DYN_DISABLE_AUTH is enabled by default for
      FVP as it is a development platform. Note that the TB_FW_CONFIG has to
      be authenticated by BL1 irrespective of these settings.
      
      The arm_bl2_dyn_cfg_init() is now earlier in bl2_plat_preload_setup()
      rather than in bl2_platform_setup() as we need to get the value of
      `disable_auth` property prior to authentication of any image by BL2.
      
      Change-Id: I734acd59572849793e5020ec44c6ac51f654a4d1
      Signed-off-by: default avatarSoby Mathew <soby.mathew@arm.com>
      6e79f9fd
  2. 16 May, 2018 2 commits
  3. 15 May, 2018 1 commit
  4. 11 May, 2018 3 commits
    • Chris Kay's avatar
      css: Fix erroneous non-secure RAM base address/size for SGI-575 · d7ecac73
      Chris Kay authored
      
      
      SGI-575's NSRAM is neither in the same place nor the same size as Juno's.
      
      Change-Id: Id6d692e9c7e9c1360014bb525eda966ebe29c823
      Signed-off-by: default avatarChris Kay <chris.kay@arm.com>
      d7ecac73
    • Antonio Nino Diaz's avatar
      plat/arm: Introduce ARM_LINUX_KERNEL_AS_BL33 build option · b726c169
      Antonio Nino Diaz authored
      
      
      Normally, BL33 needs to contain a boot loader like U-Boot or UEFI that
      eventually gives control to the OS. However, in some cases, this boot
      sequence may be too slow. For example, when doing tests in a
      cycle-accurate emulator, the user may only be interested in the
      interaction between the Trusted Firmware and the OS, not in the boot
      process itself.
      
      The new option ARM_LINUX_KERNEL_AS_BL33 allows BL33 to contain the Linux
      kernel image by changing the value of registers x0-x3 to the values
      expected by the kernel. This option requires the device tree blob (DTB)
      to be present in memory. Its address must be specified in the newly
      introduced ARM_PRELOADED_DTB_BASE build option. For now, it only supports
      AArch64 kernels.
      
      This option is only available when RESET_TO_BL31=1. For this reason
      the BL33 binary must be preloaded in memory and PRELOADED_BL33_BASE must
      be used.
      
      For example, if the kernel is loaded at 0x80080000 and the DTB is loaded
      at address 0x82000000, the firmware could be built like this:
      
          CROSS_COMPILE=aarch64-linux-gnu-  \
          make PLAT=fvp DEBUG=1             \
          RESET_TO_BL31=1                   \
          ARM_LINUX_KERNEL_AS_BL33=1        \
          PRELOADED_BL33_BASE=0x80080000    \
          ARM_PRELOADED_DTB_BASE=0x82000000 \
          all fip
      
      Change-Id: If9dc847c65ae2d0c27b51f0fd44fc06b28497db9
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      b726c169
    • Antonio Nino Diaz's avatar
      plat/arm: Migrate AArch64 port to the multi console driver · 2f18aa1f
      Antonio Nino Diaz authored
      
      
      The old API is deprecated and will eventually be removed.
      
      Arm platforms now use the multi console driver for boot and runtime
      consoles. However, the crash console uses the direct console API because
      it doesn't need any memory access to work. This makes it more robust
      during crashes.
      
      The AArch32 port of the Trusted Firmware doesn't support this new API
      yet, so it is only enabled in AArch64 builds. Because of this, the
      common code must maintain compatibility with both systems. SP_MIN
      doesn't have to be updated because it's only used in AArch32 builds.
      The TSP is only used in AArch64, so it only needs to support the new
      API without keeping support for the old one.
      
      Special care must be taken because of PSCI_SYSTEM_SUSPEND. In Juno, this
      causes the UARTs to reset (except for the one used by the TSP). This
      means that they must be unregistered when suspending and re-registered
      when resuming. This wasn't a problem with the old driver because it just
      restarted the UART, and there were no problems associated with
      registering and unregistering consoles.
      
      The size of BL31 has been increased in builds with SPM.
      
      Change-Id: Icefd117dd1eb9c498921181a21318c2d2435c441
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      2f18aa1f
  5. 04 May, 2018 1 commit
  6. 01 May, 2018 1 commit
    • Roberto Vargas's avatar
      ARM platforms: Demonstrate mem_protect from el3_runtime · 638b034c
      Roberto Vargas authored
      
      
      Previously mem_protect used to be only supported from BL2. This is not
      helpful in the case when ARM TF-A BL2 is not used. This patch demonstrates
      mem_protect from el3_runtime firmware on ARM Platforms specifically
      when RESET_TO_BL31 or RESET_TO_SP_MIN flag is set as BL2 may be absent
      in these cases. The Non secure DRAM is dynamically mapped into EL3 mmap
      tables temporarily and then the protected regions are then cleared. This
      avoids the need to map the non secure DRAM permanently to BL31/sp_min.
      
      The stack size is also increased, because DYNAMIC_XLAT_TABLES require
      a bigger stack.
      
      Change-Id: Ia44c594192ed5c5adc596c0cff2c7cc18c001fde
      Signed-off-by: default avatarRoberto Vargas <roberto.vargas@arm.com>
      638b034c
  7. 18 Apr, 2018 1 commit
  8. 16 Apr, 2018 1 commit
    • Samarth Parikh's avatar
      plat/arm: Add MHUv2 support to SCMI driver · a427785c
      Samarth Parikh authored
      
      
      Currently the SCMI driver supports MHUv1, but Arm platforms may have
      varied versions of MHU driver, with MHUv2 controllers being in the
      latest Arm platforms.
      
      This patch updates the SCMI driver to support MHUv2, specifically that
      the sender must send the wake-up to the receiver before initiating any
      data transfer.
      
      Also, the existing mhu driver files, css_mhu.c and css_mhu.h, have been
      moved from the scpi directory to a new directory, css/drivers/mhu.
      
      Change-Id: I9b46b492a3e1d9e26db12d83a9773958a8c8402f
      Signed-off-by: default avatarSamarth Parikh <samarth.parikh@arm.com>
      a427785c
  9. 13 Apr, 2018 4 commits
    • Roberto Vargas's avatar
      Fix MISRA rule 8.4 Part 4 · 3b94189a
      Roberto Vargas authored
      
      
      Rule 8.4: A compatible declaration shall be visible when
                an object or function with external linkage is defined
      
      Fixed for:
      	make DEBUG=1 PLAT=fvp SPD=tspd TRUSTED_BOARD_BOOT=1 \
      	     GENERATE_COT=1 ARM_ROTPK_LOCATION=devel_rsa \
      	     ROT_KEY=arm_rotprivk_rsa.pem MBEDTLS_DIR=mbedtls all
      
      Change-Id: Ie4cd6011b3e4fdcdd94ccb97a7e941f3b5b7aeb8
      Signed-off-by: default avatarRoberto Vargas <roberto.vargas@arm.com>
      3b94189a
    • Roberto Vargas's avatar
      Fix MISRA rule 8.4 Part 3 · 1a29f938
      Roberto Vargas authored
      
      
      Rule 8.4: A compatible declaration shall be visible when
                an object or function with external linkage is defined
      
      Fixed for:
      	make DEBUG=1 PLAT=fvp SPD=tspd all
      
      Change-Id: I0a16cf68fef29cf00ec0a52e47786f61d02ca4ae
      Signed-off-by: default avatarRoberto Vargas <roberto.vargas@arm.com>
      1a29f938
    • Roberto Vargas's avatar
      Fix MISRA rule 8.3 Part 2 · f37704bc
      Roberto Vargas authored
      
      
      Rule 8.3: All declarations of an object or function shall
                use the same names and type qualifiers.
      
      Fixed for:
      	make DEBUG=1 PLAT=juno LOG_LEVEL=50 all
      
      Change-Id: I0e4a03a0d2170cb1c632e079112a972091994a39
      Signed-off-by: default avatarRoberto Vargas <roberto.vargas@arm.com>
      f37704bc
    • Roberto Vargas's avatar
      Fix MISRA rule 8.4 Part 1 · 35a3eeb6
      Roberto Vargas authored
      
      
      Rule 8.4: A compatible declaration shall be visible when
                an object or function with external linkage is defined
      
      Fixed for:
      	make DEBUG=1 PLAT=fvp LOG_LEVEL=50 all
      
      Change-Id: I32b223251b8bf5924149d89431a65d3405a73d3e
      Signed-off-by: default avatarRoberto Vargas <roberto.vargas@arm.com>
      35a3eeb6
  10. 10 Apr, 2018 2 commits
  11. 09 Apr, 2018 1 commit
    • Amit Daniel Kachhap's avatar
      Juno: Increase bl2 max size to fix build when SPD=opteed · 83a2376e
      Amit Daniel Kachhap authored
      
      
      Building TBBR(SPD=opteed) and non-TBBR TF-A images is breaking for
      Juno for different configurations listed below:
      
      * Overflow error of 4096 bytes for rsa algorithm.
      * Overflow error of 8192 bytes for ecdsa algorithm.
      * Overflow error of 4096 bytes for rsa+ecdsa algorithm.
      * Overflow error of 4096 bytes for non-TBBR case.
      
      So this patch increments macro PLAT_ARM_MAX_BL2_SIZE for all the above
      cases accordingly.
      
      Change-Id: I75ec6c0a718181d34553fe55437f0496f467683f
      Signed-off-by: default avatarAmit Daniel Kachhap <amit.kachhap@arm.com>
      83a2376e
  12. 06 Apr, 2018 1 commit
    • David Cunado's avatar
      FVP: Fix function for translating MPIDR to linear index · 468bea41
      David Cunado authored
      The current AArch32 version of plat_arm_calc_core_pos uses an incorrect
      algorithm to calculate the linear position of a core / PE from its
      MPIDR.
      
      This patch corrects the algorithm to:
      
      (ClusterId * FVP_MAX_CPUS_PER_CLUSTER) * FVP_MAX_PE_PER_CPU
      + (CPUId * FVP_MAX_PE_PER_CPU)
      + ThreadId
      
      which supports cores where there are more than 1 PE per CPU.
      
      NOTE: the AArch64 version was fixed in 39b21d19
      
      
      
      Change-Id: I72aea89d8f72f8b1fef54e2177a0fa6fef0f5513
      Signed-off-by: default avatarDavid Cunado <david.cunado@arm.com>
      468bea41
  13. 28 Mar, 2018 1 commit
  14. 26 Mar, 2018 1 commit
  15. 21 Mar, 2018 1 commit
    • Antonio Nino Diaz's avatar
      Rename 'smcc' to 'smccc' · 085e80ec
      Antonio Nino Diaz authored
      
      
      When the source code says 'SMCC' it is talking about the SMC Calling
      Convention. The correct acronym is SMCCC. This affects a few definitions
      and file names.
      
      Some files have been renamed (smcc.h, smcc_helpers.h and smcc_macros.S)
      but the old files have been kept for compatibility, they include the
      new ones with an ERROR_DEPRECATED guard.
      
      Change-Id: I78f94052a502436fdd97ca32c0fe86bd58173f2f
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      085e80ec
  16. 17 Mar, 2018 1 commit
    • Wang Feng's avatar
      FVP: change the method for translating MPIDR values to a linear indices · 39b21d19
      Wang Feng authored
      
      
      x3 will be assigned by the folloing instructions.
      So the first instruction is not needed any more.
      
      old method:
        (ClusterId * FVP_MAX_CPUS_PER_CLUSTER)
      + (CPUId * FVP_MAX_PE_PER_CPU)
      + ThreadId
      
      it should be
        (ClusterId * FVP_MAX_CPUS_PER_CLUSTER) * FVP_MAX_PE_PER_CPU
      + (CPUId * FVP_MAX_PE_PER_CPU)
      + ThreadId
      
      which can be simplified as:
      (ClusterId * FVP_MAX_CPUS_PER_CLUSTER + CPUId) * FVP_MAX_PE_PER_CPU + ThreadId
      Signed-off-by: default avatarWang Feng <feng_feng.wang@spreadtrum.com>
      39b21d19
  17. 15 Mar, 2018 1 commit
  18. 08 Mar, 2018 1 commit
    • Soby Mathew's avatar
      Juno: Change the Firmware update detect mechanism · 7b56928a
      Soby Mathew authored
      
      
      Previously, Juno used to depend on the SSC_GPRETN register to inform
      about the reset syndrome. This method was removed when SCP migrated
      to the SDS framework. But even the SDS framework doesn't report the
      reset syndrome correctly and hence Juno failed to enter Firmware
      update mode if BL2 authentication failed.
      
      In addition to that, the error code populated in V2M_SYS_NVFLAGS register
      does not seem to be retained any more on Juno across resets. This could
      be down to the motherboard firmware not doing the necessary to preserve
      the value.
      
      Hence this patch modifies the Juno platform to use the same mechanism to
      trigger firmware update as FVP which is to corrupt the FIP TOC on
      authentication failure. The implementation in `fvp_err.c` is made common
      for ARM platforms and is moved to the new `arm_err.c` file in
      plat/arm/common folder. The BL1 and BL2 mmap table entries for Juno
      are modified to allow write to the Flash memory address.
      
      Change-Id: Ica7d49a3e8a46a90efd4cf340f19fda3b549e945
      Signed-off-by: default avatarSoby Mathew <soby.mathew@arm.com>
      7b56928a
  19. 07 Mar, 2018 1 commit
    • Soby Mathew's avatar
      BL2U: Fix ARM platform timer initilization · 74847ab2
      Soby Mathew authored
      
      
      This issue was detected when testing FWU on Juno. The Timer
      `timer_ops` was not being initialized before being used by
      the SDS driver on Juno. This patch adds the call to
      `generic_delay_timer_init()` during bl2u_early_platform_setup().
      This is done generically for all ARM platforms because the
      cost involved is minimal.
      
      Change-Id: I349cf0bd1db68406eb2298b65f9c729f792cabdc
      Signed-off-by: default avatarSoby Mathew <soby.mathew@arm.com>
      74847ab2
  20. 02 Mar, 2018 2 commits
    • Soby Mathew's avatar
      Remove sp_min functions from plat_common.c · 0ed8c001
      Soby Mathew authored
      
      
      This patch removes default platform implementations of sp_min
      platform APIs from plat/common/aarch32/plat_common.c. The APIs
      are now implemented in `plat_sp_min_common.c` file within the
      same folder.
      
      The ARM platform layer had a weak definition of sp_min_platform_setup2()
      which conflicted with the weak definition in the common file. Hence this
      patch fixes that by introducing a `plat_arm_` version of the API thus
      allowing individual boards within ARM platforms to override it if they
      wish to.
      
      Fixes ARM-software/tf-issues#559
      
      Change-Id: I11a74ecae8191878ccc7ea03f12bdd5ae88faba5
      Signed-off-by: default avatarSoby Mathew <soby.mathew@arm.com>
      0ed8c001
    • Roberto Vargas's avatar
      Fix FVP DRAM2 size · d0c63eaa
      Roberto Vargas authored
      
      
      This was correct according to the model specifications , but it seems
      that FVP doesn't implement it. It is safer to use the size exposed by
      the DTB which is currently used by Linux.
      
      Change-Id: I9aabe3284a50ec2a36ed94966eb7e4ddf37cec3b
      Signed-off-by: default avatarRoberto Vargas <roberto.vargas@arm.com>
      d0c63eaa
  21. 28 Feb, 2018 5 commits
    • Roberto Vargas's avatar
      Fix MISRA rule 8.4 Part 2 · fd116b9f
      Roberto Vargas authored
      
      
      Rule 8.4: A compatible declaration shall be visible when
                an object or function with external linkage is defined
      
      Fixed for:
      	make DEBUG=1 PLAT=juno LOG_LEVEL=50 all
      
      Change-Id: Ic8f611da734f356566e8208053296e6c62b54709
      Signed-off-by: default avatarRoberto Vargas <roberto.vargas@arm.com>
      fd116b9f
    • Roberto Vargas's avatar
      Fix MISRA rule 8.4 Part 1 · 1af540ef
      Roberto Vargas authored
      
      
      Rule 8.4: A compatible declaration shall be visible when
                an object or function with external linkage is defined
      
      Fixed for:
      	make DEBUG=1 PLAT=fvp LOG_LEVEL=50 all
      
      Change-Id: I7c2ad3f5c015411c202605851240d5347e4cc8c7
      Signed-off-by: default avatarRoberto Vargas <roberto.vargas@arm.com>
      1af540ef
    • Roberto Vargas's avatar
      Fix MISRA rule 8.3 Part 1 · dc6aad2e
      Roberto Vargas authored
      
      
      Rule 8.3: All declarations of an object or function shall
                use the same names and type qualifiers.
      
      Fixed for:
      
      	make DEBUG=1 PLAT=fvp LOG_LEVEL=50 all
      
      Change-Id: I48201c9ef022f6bd42ea8644529afce70f9b3f22
      Signed-off-by: default avatarRoberto Vargas <roberto.vargas@arm.com>
      dc6aad2e
    • Jeenu Viswambharan's avatar
      FVP: Allow building for DynamIQ systems · fe7210cd
      Jeenu Viswambharan authored
      
      
      FVPs that model DynamIQ configuration implements all CPUs in a single
      cluster. I.e., such models have a single cluster with more than 4 CPUs.
      This differs from existing default build configuration for FVP where up
      to 4 CPUs are assumed per cluster.
      
      To allow building for DynamIQ configuration, promote the macro
      FVP_MAX_CPUS_PER_CLUSTER as a build option to have it set from the build
      command line. The value of the build option defaults to 4.
      
      Change-Id: Idc3853bc95f680869b434b011c2dbd733e40c6ce
      Signed-off-by: default avatarJeenu Viswambharan <jeenu.viswambharan@arm.com>
      fe7210cd
    • Sandrine Bailleux's avatar
      Select SCMI/SDS drivers by default on Juno · 01e808c6
      Sandrine Bailleux authored
      
      
      The SCP binaries provided in the 17.10 Linaro release (and onwards)
      have migrated to the SCMI/SDS protocols. Therefore, the ARM TF should
      now use the corresponding drivers by default.
      
      This patch changes the default value of the CSS_USE_SCMI_SDS_DRIVER
      build option to 1 for Juno.
      
      Change-Id: Idb7e3c6af582f49e332167a2158703c2d781b437
      Signed-off-by: default avatarSandrine Bailleux <sandrine.bailleux@arm.com>
      01e808c6
  22. 27 Feb, 2018 4 commits
  23. 26 Feb, 2018 3 commits
    • Soby Mathew's avatar
      Dynamic cfg: MISRA fixes · da5f2745
      Soby Mathew authored
      
      
      Change-Id: I1d85b76af002b8b672fcaeca94939b7420bc8243
      Signed-off-by: default avatarSoby Mathew <soby.mathew@arm.com>
      da5f2745
    • Soby Mathew's avatar
      FVP: Add TB_FW_CONFIG and HW_CONFIG · ce6d9643
      Soby Mathew authored
      
      
      This patch adds TB_FW_CONFIG for FVP and allows FVP
      to select the appropriate HW_CONFIG to include in the
      fip. The HW_CONFIG for FVP is selected via `FVP_HW_CONFIG_DTS`
      build option. The TB_FW_CONFIG specifies the load address of
      HW_CONFIG to BL2. Since currently the load address is different
      between AARCH32 and AARCH64, 2 separate TB_FW_CONFIGs are
      maintained for the 2 modes.
      
      Change-Id: Ide8581e752dfa900087f5895c775073c841c0daf
      Signed-Off-By: default avatarSoby Mathew <soby.mathew@arm.com>
      ce6d9643
    • Soby Mathew's avatar
      ARM Platforms: Load HW_CONFIG in BL2 · cab0b5b0
      Soby Mathew authored
      
      
      The patch adds the necessary changes to load HW_CONFIG in BL2 for
      ARM Platforms :
      
      1. The load address of HW_CONFIG is specified via the `hw_config_addr`
      property in TB_FW_CONFIG is loaded by BL1. The `hw_config_max_size`
      property defines the maximum size to be expected for the HW_CONFIG.
      The `arm_dyn_cfg_helpers.c` and corresponding header implements
      utility functions to parse these DT properties defined.
      The `arm_dyn_cfg.c` implements wrappers to these helpers to enable
      them to be invoked from ARM platform layer.
      
      2. `HW_CONFIG` is added to the `bl2_mem_params_descs[]` array which is
      the list of images to be loaded by BL2.
      
      3. The `libfdt` sources are now included when BL2 is built
      
      4. A new helper `populate_next_bl_params_config()` is introduced in
      desc_image_load.c to populate the subsequent executable BL images
      with the `hw_config` and the corresponding `fw_config` if available.
      The `plat_get_next_bl_params()` API for ARM platforms is modified to
      invoke this new helper.
      
      5. The implementation of `bl2_early_platform_setup2()` is modified to
      consider `arg0` as well in addition to `arg1` passed from BL1.
      
      6. Bump up the BL2 size for Juno to accommodate the inclusion of libfdt.
      
      Change-Id: I80f1554adec41753e0d179a5237364f04fe13a3f
      Signed-off-by: default avatarSoby Mathew <soby.mathew@arm.com>
      cab0b5b0