1. 10 Aug, 2018 2 commits
  2. 03 Aug, 2018 6 commits
  3. 01 Aug, 2018 1 commit
    • Daniel Boulby's avatar
      Fix build for SEPARATE_CODE_AND_RODATA=0 · 2ecaafd2
      Daniel Boulby authored
      
      
      TF won't build since no memory region is specified
      for when SEPARATE_CODE_AND_RODATA=0 it still relies on
      the ARM_MAP_BL_RO_DATA region which is never defined for
      this case. Create memory region combining code and RO data for
      when the build flag SEPARATE_CODE_AND_RODATA=0 to fix this
      
      Change-Id: I6c129eb0833497710cce55e76b8908ce03e0a638
      Signed-off-by: default avatarDaniel Boulby <daniel.boulby@arm.com>
      2ecaafd2
  4. 30 Jul, 2018 1 commit
  5. 27 Jul, 2018 1 commit
  6. 26 Jul, 2018 8 commits
    • Andrew F. Davis's avatar
      ti: k3: common: Only enable caches early · 903f13d3
      Andrew F. Davis authored
      
      
      We can enter and exit coherency without any software operations,
      but HW_ASSISTED_COHERENCY has stronger implications that are
      causing issues. Until these can be resolved, only use the weaker
      WARMBOOT_ENABLE_DCACHE_EARLY flag.
      Signed-off-by: default avatarAndrew F. Davis <afd@ti.com>
      903f13d3
    • Sughosh Ganu's avatar
      RAS: SGI: Add flags needed to build components for RAS feature · f29d1828
      Sughosh Ganu authored
      
      
      Add the various flags that are required to build the components needed
      to enable the RAS feature on SGI575 platform. By default, all flags
      are set to 0, disabling building of all corresponding components.
      
      Change-Id: I7f8536fba895043ef6e397cc33ac9126cb572132
      Signed-off-by: default avatarSughosh Ganu <sughosh.ganu@arm.com>
      f29d1828
    • Sughosh Ganu's avatar
      RAS: SGI575: Add platform specific RAS changes · 167dae4d
      Sughosh Ganu authored
      
      
      Add platform specific changes needed to add support for the RAS
      feature on SGI575 platform, including adding a mapping for the
      CPER buffer being used on SGI575 platform.
      
      Change-Id: I01a982e283609b5c48661307906346fa2738a43b
      Signed-off-by: default avatarSughosh Ganu <sughosh.ganu@arm.com>
      167dae4d
    • Sughosh Ganu's avatar
      RAS: SGI: Add platform handler for RAS interrupts · 485fc954
      Sughosh Ganu authored
      
      
      Add a platform specific handler for RAS interrupts and configure the
      platform RAS interrupts for EL3 handling. The interrupt handler passes
      control to StandaloneMM code executing in S-EL0, which populates the
      CPER buffer with relevant error information. The handler subsequently
      invokes the SDEI client which processes the information in the error
      information in the CPER buffer. The helper functions
      plat_sgi_get_ras_ev_map and plat_sgi_get_ras_ev_map_size would be
      defined for sgi platforms in the subsequent patch, which adds sgi575
      specific RAS changes.
      
      Change-Id: I490f16c15d9917ac40bdc0441659b92380108d63
      Signed-off-by: default avatarSughosh Ganu <sughosh.ganu@arm.com>
      485fc954
    • Sughosh Ganu's avatar
      SPM: SGI: Map memory allocated for secure partitions · d9523919
      Sughosh Ganu authored
      
      
      The secure partition manager reserves chunks of memory which are used
      for the S-EL0 StandaloneMM image and the buffers required for
      communication between the Non-Secure world with the StandaloneMM
      image. Add the memory chunks to relevant arrays for mapping the
      regions of memory with corresponding attributes.
      
      Change-Id: If371d1afee0a50ca7cacd55e16aeaca949d5062b
      Signed-off-by: default avatarSughosh Ganu <sughosh.ganu@arm.com>
      d9523919
    • Sughosh Ganu's avatar
      ARM platforms: Allow board specific definition of SP stack base · 2e4a509d
      Sughosh Ganu authored
      
      
      The SGI platforms need to allocate memory for CPER buffers. These
      platform buffers would be placed between the shared reserved memory
      and the per cpu stack memory, thus the need to redefine stack base
      pointer for these platforms. This patch allows each board in ARM
      platform to define the PLAT_SP_IMAGE_STACK_BASE.
      
      Change-Id: Ib5465448b860ab7ab0f645f7cb278a67acce7be9
      Signed-off-by: default avatarSughosh Ganu <sughosh.ganu@arm.com>
      2e4a509d
    • Sughosh Ganu's avatar
      SGI: Include arm_spm_def.h in platform_def.h · d9cc9372
      Sughosh Ganu authored
      
      
      Include arm_spm_def.h in the platform_def.h file. Without this
      inclusion, we get build errors like
      
      In file included from services/std_svc/spm/sp_setup.c:12:0:
      services/std_svc/spm/sp_setup.c: In function 'spm_sp_setup':
      services/std_svc/spm/sp_setup.c:61:57: error: 'PLAT_SPM_BUF_BASE'
        undeclared (first use in this function)
        write_ctx_reg(get_gpregs_ctx(ctx), CTX_GPREG_X0, PLAT_SPM_BUF_BASE);
      
      Now that the platform_def.h includes arm_spm_def.h, remove inclusion
      of platform_def.h in arm_spm_def.h to remove the circular dependency.
      
      Change-Id: I5225c8ca33fd8d288849524395e436c3d56daf17
      Signed-off-by: default avatarSughosh Ganu <sughosh.ganu@arm.com>
      d9cc9372
    • Sughosh Ganu's avatar
      Include board_arm_def.h through the platform's header · 46b69e3d
      Sughosh Ganu authored
      
      
      The board_arm_def.h header file needs to be included via the platform
      definition header. Not doing so, results in a redefinition error of
      PLAT_ARM_MAX_BL31_SIZE macro, if defined in the platform definition
      file.
      
      Change-Id: I1d178f6e8a6a41461e7fbcab9f6813a2faa2d82b
      Signed-off-by: default avatarSughosh Ganu <sughosh.ganu@arm.com>
      46b69e3d
  7. 24 Jul, 2018 13 commits
  8. 22 Jul, 2018 1 commit
  9. 20 Jul, 2018 1 commit
  10. 19 Jul, 2018 3 commits
    • Jeenu Viswambharan's avatar
      RAS: Introduce handler for EL3 EAs · eaeaa4d0
      Jeenu Viswambharan authored
      
      
      External Aborts while executing in EL3 is fatal in nature. This patch
      allows for the platform to define a handler for External Aborts received
      while executing in EL3. A default implementation is added which falls
      back to platform unhandled exception.
      
      Change-Id: I466f2c8113a33870f2c7d2d8f2bf20437d9fd354
      Signed-off-by: default avatarJeenu Viswambharan <jeenu.viswambharan@arm.com>
      eaeaa4d0
    • Jeenu Viswambharan's avatar
      RAS: Introduce handler for Double Faults · d5a23af5
      Jeenu Viswambharan authored
      
      
      Double fault is when the PE receives another error whilst one is being
      handled. To detect double fault condition, a per-CPU flag is introduced
      to track the status of error handling. The flag is checked/modified
      while temporarily masking external aborts on the PE.
      
      This patch routes double faults to a separate platform-defined handler.
      
      Change-Id: I70e9b7ba4c817273c55a0af978d9755ff32cc702
      Signed-off-by: default avatarJeenu Viswambharan <jeenu.viswambharan@arm.com>
      d5a23af5
    • Jeenu Viswambharan's avatar
      RAS: Introduce handler for Uncontainable errors · b56dc2a9
      Jeenu Viswambharan authored
      
      
      Uncontainable errors are the most severe form of errors, which typically
      mean that the system state can't be trusted any more. This further means
      that normal error recovery process can't be followed, and an orderly
      shutdown of the system is often desirable.
      
      This patch allows for the platform to define a handler for Uncontainable
      errors received. Due to the nature of Uncontainable error, the handler
      is expected to initiate an orderly shutdown of the system, and therefore
      is not expected to return. A default implementation is added which falls
      back to platform unhandled exception.
      
      Also fix ras_arch.h header guards.
      
      Change-Id: I072e336a391a0b382e77e627eb9e40729d488b55
      Signed-off-by: default avatarJeenu Viswambharan <jeenu.viswambharan@arm.com>
      b56dc2a9
  11. 18 Jul, 2018 3 commits