- 21 Sep, 2018 1 commit
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Daniel Boulby authored
Ensure case clauses: * Terminate with an unconditional break, return or goto statement. * Use conditional break, return or goto statements as long as the end of the case clause is unreachable; such case clauses must terminate with assert(0) /* Unreachable */ or an unconditional __dead2 function call * Only fallthough when doing otherwise would result in less readable/maintainable code; such case clauses must terminate with a /* Fallthrough */ comment to make it clear this is the case and indicate that a fallthrough is intended. This reduces the chance of bugs appearing due to unintended flow through a switch statement Change-Id: I70fc2d1f4fd679042397dec12fd1982976646168 Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>
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- 04 Sep, 2018 3 commits
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Siva Durga Prasad Paladugu authored
Add support for writing to AFI registers. So that after writing a bitstream the interface can be programmed. Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Signed-off-by: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
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Siva Durga Prasad Paladugu authored
Since the MMIO read/write APIs are removed from Linux user space, Linux cannot directly write to the Global General Storage Register 4 any more to set healthy boot status. Create an IOCTL to allow Linux to set boot health status. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Acked-by: Will Wong <willw@xilinx.com>
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Siva Durga Prasad Paladugu authored
To make ULPI transceiver work, a HIGH - LOW - HIGH pulse needs to be given to resetb pin of ULPI chip. In ZYNQMP, this resetb pin is being driven by BOOT MODE PIN 1. The BOOT MODE PIN's are controlled by BOOT_PIN_CTRL register present in CRL_APB address region. Since CRL_APB can be resticted to secure access, this pin should be controlled by ATF. This patch adds the support for the same. Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
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- 15 Mar, 2018 5 commits
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Jolly Shah authored
Various changes to comply with MISRA static analysis rules Signed-off-by: Jolly Shah <jollys@xilinx.com>
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Rajan Vaja authored
Add IOCTLs to read/write global general storage and persistent global general storage registers access. Signed-off-by: Rajan Vaja <rajanv@xilinx.com> Signed-off-by: Jolly Shah <jollys@xilinx.com>
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Rajan Vaja authored
These are empty functions with no logic right now. Code will be added in subsequent commits. Signed-off-by: Rajan Vaja <rajanv@xilinx.com> Signed-off-by: Jolly Shah <jollys@xilinx.com>
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Rajan Vaja authored
Implement ioctl APIs which uses MMIO operations to configure devices. Below IOCTLs are supported in this patch: * Set tap delay bypass * Set SGMII mode * SD reset * Set SD/MMC tap delay Signed-off-by: Rajan Vaja <rajanv@xilinx.com> Signed-off-by: Jolly Shah <jollys@xilinx.com>
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Rajan Vaja authored
Implement ioctl APIs which uses MMIO operations to control RPU operations. Below IOCTLs are supported in this patch: * Get RPU operation mode * Set RPU operation mode * Configure RPU boot address (OCM/TCM) * Configure TCM combined mode Signed-off-by: Rajan Vaja <rajanv@xilinx.com> Signed-off-by: Jolly Shah <jollys@xilinx.com>
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