1. 26 Feb, 2014 1 commit
    • Sandrine Bailleux's avatar
      fvp: Initialise UART earlier · 20d284c0
      Sandrine Bailleux authored
      The UART used to be initialised in bl1_platform_setup(). This is too
      late because there are some calls to the assert() macro, which needs
      to print some messages on the console, before that.
      
      This patch moves the UART initialisation code to
      bl1_early_platform_setup().
      
      Fixes ARM-software/tf-issues#49
      
      Change-Id: I98c83a803866372806d2a9c2e1ed80f2ef5b3bcc
      20d284c0
  2. 20 Feb, 2014 3 commits
    • Achin Gupta's avatar
      Add support for BL3-2 in BL3-1 · 35ca3511
      Achin Gupta authored
      This patch adds the following support to the BL3-1 stage:
      
      1. BL3-1 allows runtime services to specify and determine the security
         state of the next image after BL3-1. This has been done by adding
         the `bl31_set_next_image_type()` & `bl31_get_next_image_type()`
         apis. The default security state is non-secure. The platform api
         `bl31_get_next_image_info()` has been modified to let the platform
         decide which is the next image in the desired security state.
      
      2. BL3-1 exports the `bl31_prepare_next_image_entry()` function to
         program entry into the target security state. It uses the apis
         introduced in 1. to do so.
      
      3. BL3-1 reads the information populated by BL2 about the BL3-2 image
         into its internal data structures.
      
      4. BL3-1 introduces a weakly defined reference `bl32_init()` to allow
         initialisation of a BL3-2 image. A runtime service like the Secure
         payload dispatcher will define this function if present.
      
      Change-Id: Icc46dcdb9e475ce6575dd3f9a5dc7a48a83d21d1
      35ca3511
    • Achin Gupta's avatar
      Add support for BL3-2 in BL2 · a3050ed5
      Achin Gupta authored
      
      
      This patch adds support for loading a BL3-2 image in BL2. In case a
      BL3-2 image is found, it also passes information to BL3-1 about where it
      is located and the extents of memory available to it. Information about
      memory extents is populated by platform specific code.
      
      The documentation has also been updated to reflect the above changes.
      
      Change-Id: I526b2efb80babebab1318f2b02e319a86d6758b0
      Co-authored-by: default avatarJeenu Viswambharan <jeenu.viswambharan@arm.com>
      a3050ed5
    • Achin Gupta's avatar
      Rework BL2 to BL3-1 hand over interface · e4d084ea
      Achin Gupta authored
      This patch reworks BL2 to BL3-1 hand over interface by introducing a
      composite structure (bl31_args) that holds the superset of information
      that needs to be passed from BL2 to BL3-1.
      
        - The extents of secure memory available to BL3-1
        - The extents of memory available to BL3-2 (not yet implemented) and
          BL3-3
        - Information to execute BL3-2 (not yet implemented) and BL3-3 images
      
      This patch also introduces a new platform API (bl2_get_bl31_args_ptr)
      that needs to be implemented by the platform code to export reference to
      bl31_args structure which has been allocated in platform-defined memory.
      
      The platform will initialize the extents of memory available to BL3-3
      during early platform setup in bl31_args structure. This obviates the
      need for bl2_get_ns_mem_layout platform API.
      
      BL2 calls the bl2_get_bl31_args_ptr function to get a reference to
      bl31_args structure. It uses the 'bl33_meminfo' field of this structure
      to load the BL3-3 image. It sets the entry point information for the
      BL3-3 image in the 'bl33_image_info' field of this structure. The
      reference to this structure is passed to the BL3-1 image.
      
      Also fixes issue ARM-software/tf-issues#25
      
      Change-Id: Ic36426196dd5ebf89e60ff42643bed01b3500517
      e4d084ea
  3. 17 Feb, 2014 1 commit
  4. 20 Jan, 2014 1 commit
  5. 17 Jan, 2014 1 commit
  6. 20 Dec, 2013 1 commit
    • Harry Liebel's avatar
      Local C library documentation updates · a960f282
      Harry Liebel authored
      - Update porting guide to describe where files live and how to get
        FreeBSD source code.
      - Update change-log to describe relocation and new functions.
      
      Change-Id: Id8f30cc7bafdd1064b3a5c5aae958c5aa3fb79f3
      a960f282
  7. 12 Dec, 2013 1 commit
    • Sandrine Bailleux's avatar
      Remove useless copies of meminfo structures · ee12f6f7
      Sandrine Bailleux authored
      Platform setup code has to reserve some memory for storing the
      memory layout information.  It is populated in early platform setup
      code.
      
      blx_get_sec_mem_layout() functions used to return a copy of this
      structure.  This patch modifies blx_get_sec_mem_layout() functions
      so that they now directly return a pointer to their memory layout
      structure.  It ensures that the memory layout returned by
      blx_get_sec_mem_layout() is always up-to-date and also avoids a
      useless copy of the meminfo structure.
      
      Also rename blx_get_sec_mem_layout() to blx_plat_sec_mem_layout()
      to make it clear those functions are platform specific.
      
      Change-Id: Ic7a6f9d6b6236b14865ab48a9f5eff545ce56551
      ee12f6f7
  8. 05 Dec, 2013 3 commits
    • Achin Gupta's avatar
      psci: fix error due to a non zero context id · c8afc789
      Achin Gupta authored
      In the previous psci implementation, the psci_afflvl_power_on_finish()
      function would run into an error condition if the value of the context
      id parameter in the cpu_on and cpu_suspend psci calls was != 0. The
      parameter was being restored as the return value of the affinity level
      0 finisher function. A non zero context id would be treated as an
      error condition. This would prevent successful wake up of the cpu from
      a power down state. Also, the contents of the general purpose
      registers were not being cleared upon return to the non-secure world
      after a cpu power up. This could potentially allow the non-secure
      world to view secure data.
      
      This patch ensures that all general purpose registers are set to ~0
      prior to the final eret that drops the execution to the non-secure
      world. The context id is used to initialize the general purpose
      register x0 prior to re-entry into the non-secure world and is no
      longer restored as a function return value. A platform helper
      (platform_get_stack()) has been introduced to facilitate this change.
      
      Change-Id: I2454911ffd75705d6aa8609a5d250d9b26fa097c
      c8afc789
    • Dan Handley's avatar
      Enable third party contributions · ab2d31ed
      Dan Handley authored
      - Add instructions for contributing to ARM Trusted Firmware.
      
      - Update copyright text in all files to acknowledge contributors.
      
      Change-Id: I9311aac81b00c6c167d2f8c889aea403b84450e5
      ab2d31ed
    • Sandrine Bailleux's avatar
      Update user guide further to linker scripts changes · cd29b0a6
      Sandrine Bailleux authored
      This patch updates the user guide section about the memory layout.
        - Explain the verifications that the linker scripts does on the
          global memory layout.
        - Refer to the new linker symbols.
        - Describe the linker symbols exported to the trusted firmware code.
      
      Change-Id: I033ab2b867e8b9776deb4185b9986bcb8218f286
      cd29b0a6
  9. 14 Nov, 2013 1 commit
  10. 25 Oct, 2013 1 commit