- 02 Mar, 2020 1 commit
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Leo Yan authored
On Hikey960 if outputs GPIO176 low level, it can tell PMIC to power off the whole board. To avoid resetting the board and stay off, it also requires the SW2201's three switches 1/2/3 need to be all set to 0. Since current code doesn't contain complete GPIO modules and misses to support GPIO176. This patch adds all known GPIO modules and initialize GPIO in BL31, and adds system power off callback to use GPIO176 for PMIC power off operation. Change-Id: Ia88859b8b7c87c061420ef75f0de3e2768667bb0 Signed-off-by: Leo Yan <leo.yan@linaro.org>
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- 24 Jan, 2020 1 commit
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Deepika Bhavnani authored
PLATFORM_CORE_COUNT - Unsigned int PLATFORM_CLUSTER_COUNT - Unsigned int PLATFORM_MAX_CPUS_PER_CLUSTER - Unsigned int PLATFORM_CORE_COUNT_PER_CLUSTER - Unsigned int Signed-off-by: Deepika Bhavnani <deepika.bhavnani@arm.com> Change-Id: I327a8a2ab0f0e49bd62f413296c3b326393422b6
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- 01 Aug, 2019 1 commit
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Julius Werner authored
NOTE: AARCH32/AARCH64 macros are now deprecated in favor of __aarch64__. All common C compilers pre-define the same macros to signal which architecture the code is being compiled for: __arm__ for AArch32 (or earlier versions) and __aarch64__ for AArch64. There's no need for TF-A to define its own custom macros for this. In order to unify code with the export headers (which use __aarch64__ to avoid another dependency), let's deprecate the AARCH32 and AARCH64 macros and switch the code base over to the pre-defined standard macro. (Since it is somewhat unintuitive that __arm__ only means AArch32, let's standardize on only using __aarch64__.) Change-Id: Ic77de4b052297d77f38fc95f95f65a8ee70cf200 Signed-off-by: Julius Werner <jwerner@chromium.org>
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- 12 Jul, 2019 1 commit
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Justin Chadwell authored
This consists of ensuring that the left operand of each shift is unsigned when the operation might overflow into the sign bit. Change-Id: I67984b6c48c08af61e95a4dbd18047e2c3151f9a Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
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- 11 Feb, 2019 1 commit
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Ryan Grachek authored
There exists a third DMA controller on the hi3660 SoC called the IOMCU DMAC. This controller is used by peripherals like SPI2 and UART3. Initialize channels 4-7 as non-secure, while 0-3 remain reserved and secure. Signed-off-by: Ryan Grachek <ryan@edited.us>
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- 10 Jan, 2019 1 commit
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Joel Hutton authored
It is cleaner to use the same number of tables regardless of whether OP-TEE is used or not. This doesn't result in a significant memory usage increase. Change-Id: I38bcaa3f2f197c0a352153117592749f189a265c Signed-off-by: Joel Hutton <Joel.Hutton@Arm.com>
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- 04 Jan, 2019 1 commit
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Antonio Nino Diaz authored
Enforce full include path for includes. Deprecate old paths. The following folders inside include/lib have been left unchanged: - include/lib/cpus/${ARCH} - include/lib/el3_runtime/${ARCH} The reason for this change is that having a global namespace for includes isn't a good idea. It defeats one of the advantages of having folders and it introduces problems that are sometimes subtle (because you may not know the header you are actually including if there are two of them). For example, this patch had to be created because two headers were called the same way: e0ea0928 ("Fix gpio includes of mt8173 platform to avoid collision."). More recently, this patch has had similar problems: 46f9b2c3 ("drivers: add tzc380 support"). This problem was introduced in commit 4ecca339 ("Move include and source files to logical locations"). At that time, there weren't too many headers so it wasn't a real issue. However, time has shown that this creates problems. Platforms that want to preserve the way they include headers may add the removed paths to PLAT_INCLUDES, but this is discouraged. Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 10 Dec, 2018 1 commit
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Yann Gautier authored
This is used as a table index, and already compared with an unsigned int: block_dev_count. Signed-off-by: Yann Gautier <yann.gautier@st.com>
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- 29 Nov, 2018 1 commit
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Ryan Grachek authored
This is needed to utilize the DMA controller on the hikey960 Signed-off-by: Ryan Grachek <ryan@edited.us>
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- 08 Nov, 2018 1 commit
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Antonio Nino Diaz authored
All identifiers, regardless of use, that start with two underscores are reserved. This means they can't be used in header guards. The style that this project is now to use the full name of the file in capital letters followed by 'H'. For example, for a file called "uart_example.h", the header guard is UART_EXAMPLE_H. The exceptions are files that are imported from other projects: - CryptoCell driver - dt-bindings folders - zlib headers Change-Id: I50561bf6c88b491ec440d0c8385c74650f3c106e Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 28 Sep, 2018 1 commit
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Antonio Nino Diaz authored
- Migrate to new GIC interfaces. - Remove unused bl1_init_bl2_mem_layout(). - Migrate to bl31_early_platform_setup2(). - Use PLAT_VIRT_ADDR_SPACE_SIZE and PLAT_PHY_ADDR_SPACE_SIZE. - Remove references to removed build options. - Update Makefile paths. Change-Id: I583fd893555e6535f32d87ed67bbae430b8e6afe Tested-by: Haojian Zhuang <haojian.zhuang@linaro.org> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 26 Sep, 2018 1 commit
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Haojian Zhuang authored
plat/hisilicon/hikey960/include/plat_macros.S:19:55: error: unexpected token in '.asciz' directive .asciz "gicd_ispendr regs (Offsets 0x200 - 0x278)\n" " Offset:\t\t\tvalue\n" ^ Makefile:720: recipe for target 'build/hikey960/debug/bl1/cortex_a53.o' failed make: *** [build/hikey960/debug/bl1/cortex_a53.o] Error 1 Merge the two lines into one. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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- 09 Sep, 2018 1 commit
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Teddy Reed authored
This patch adds experimental support for TBB to the HiKey960 board. To build and test with TBB modify the uefi-tools project platforms.config +ATF_BUILDFLAGS=TRUSTED_BOARD_BOOT=1 GENERATE_COT=1 SAVE_KEYS=1 \ MBEDTLS_DIR=./mbedtls Signed-off-by: Teddy Reed <teddy@casualhacking.io>
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- 27 Jul, 2018 1 commit
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Kaihua Zhong authored
GPIO_089 connects to PCIE_PERST_N. It needs to be configured as output low. Signed-off-by: Kaihua Zhong <zhongkaihua@huawei.com> Signed-off-by: Xiaowei Song <songxiaowei@hisilicon.com> Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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- 20 Jul, 2018 1 commit
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Antonio Nino Diaz authored
Also change header guards to fix defects of MISRA C-2012 Rule 21.1. Change-Id: Ied0d4b0e557ef6119ab669d106d2ac5d99620c57 Acked-by: Sumit Garg <sumit.garg@linaro.org> Acked-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 05 Mar, 2018 2 commits
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Haojian Zhuang authored
Since non-TF ROM is used in HiKey960 platform (Hisilicon Hi3660 SoC), replace BL1 by BL2_EL3 in normal boot mode. When flush images in recovery mode, keep to use BL1. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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Haojian Zhuang authored
Since LOAD_IMAGE_V2 is always enabled in HiKey960 platform. Drop LOAD_IMAGE v1 to simplify code. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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- 27 Feb, 2018 1 commit
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David Cunado authored
MISRA C-2012 Rule 7.3 violation: lowercase l shall not be used as literal suffixes. This patch resolves this for the ULL() macro by using ULL suffix instead of the ull suffix. Change-Id: Ia8183c399e74677e676956e8653e82375d0e0a01 Signed-off-by: David Cunado <david.cunado@arm.com>
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- 16 Jan, 2018 1 commit
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Leo Yan authored
This reverts commit fdae60b6. The commit fdae60b6 changed the parameter encoding for the hikey960. However that implies a DT change in the kernel side. After submitting the DT change for upstreaming, the backward compatibility issue and the interface change raise some concerns from the Linux community about the issues related to kernel <-> ATF alignment. There is no way to detect a mis-alignment of those without a deep knowledge of the ATF and the kernel. Furthermore, the failing calls to PSCI in the idle path (because of bad parameters), will lead to busy looping, implying: thermal issues and extra energy consumption. In regard of the Linux community concerns, the potential issues when the ATF and the kernel are not aligned, it is preferable to revert the commit. Cc: Vincent Guittot <vincent.guittot@linaro.org> Cc: Haojian Zhuang <haojian.zhuang@linaro.org> Cc: Kevin Wang <jean.wangtao@linaro.org> Co-authored-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Leo Yan <leo.yan@linaro.org>
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- 09 Jan, 2018 1 commit
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Kaihua Zhong authored
Set IOC_AO_IOMG_033 function from GPIO213 to PCIE_CLKREQ_N bit[0-2]: 000: GPIO_213; 001: PCIE_CLKREQ_N; 010: GPIO_018_SH; 100: GPIO_014_SE; 110: FAC_TEST24; 111: FAC_TEST24; bit[3-31]: reserved Signed-off-by: Guangtao Zhang <zhangguangtao@hisilicon.com> Tested-by: Yao Chen <chenyao11@huawei.com> Acked-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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- 06 Dec, 2017 1 commit
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Leo Yan authored
ARM Power State Coordination Interface (ARM DEN 0022D) chapter 6.5 "Recommended StateID Encoding" defines the state ID which can be used by platforms. The recommended power states can be presented by below values; and it divides into three fields, every field has 4 bits to present power states corresponding to core level, cluster level and system level. 0: Run 1: Standby 2: Retention 3: Powerdown This commit changes to use upper recommended power states definition on Hikey960; and changes the power state validate function to check the power state passed from kernel side. Signed-off-by: Leo Yan <leo.yan@linaro.org>
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- 01 Nov, 2017 1 commit
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Roberto Vargas authored
These macros are only defined for corresponding image, and they are undefined for other images. It means that we have to use ifdef or defined() instead of relying on being 0 by default. Change-Id: Iad11efab9830ddf471599b46286e1c56581ef5a7 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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- 13 Sep, 2017 1 commit
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Victor Chong authored
Otherwise, BL2 tries to load a BL32 image and triggers assert(result == 0) in plat_get_image_source() in hikey{960}_io_storage.c in a debug build, or displays ERROR: BL2: Failed to load image in a release build. Signed-off-by: Victor Chong <victor.chong@linaro.org>
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- 01 Sep, 2017 2 commits
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Victor Chong authored
Signed-off-by: Victor Chong <victor.chong@linaro.org>
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Victor Chong authored
Signed-off-by: Victor Chong <victor.chong@linaro.org> Signed-off-by: Leo Yan <leo.yan@linaro.org>
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- 14 Jul, 2017 1 commit
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Isla Mitchell authored
This fix modifies the order of system includes to meet the ARM TF coding standard. There are some exceptions to this change in order to retain header groupings and where there are headers within #if statements. Change-Id: Ib5b668c992d817cc860e97b29e16ef106d17e404 Signed-off-by: Isla Mitchell <isla.mitchell@arm.com>
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- 12 Jul, 2017 1 commit
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Victor Chong authored
Signed-off-by: Victor Chong <victor.chong@linaro.org> Acked-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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- 07 Jun, 2017 2 commits
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Haojian Zhuang authored
Support BL31 on HiKey960 platform. Implement PSCI. Signed-off-by: Leo Yan <leo.yan@linaro.org> Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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Haojian Zhuang authored
Support BL1 on HiKey960 platform. When recovery mode is detected, BL1 loads NS BL1U that flushs images into UFS. When normal boot mode is detected, BL1 loads BL2. Fix for https://github.com/ARM-software/tf-issues/issues/486 Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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